llvm-svn: 112924

llvm-svn: 97504

 - Sorry, I can't help myself.

 - No intended functionality change.

llvm-svn: 74742

llvm-svn: 64915

index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.

llvm-svn: 51808

CodeGenDAGPatterns, where it can be used in other tablegen backends.
This allows the inference to be done for DAGISelEmitter so that it
gets accurate mayLoad/mayStore/isSimpleLoad flags. 

This brings MemOperand functionality back to where it was before
48329. However, it doesn't solve the problem of anonymous patterns
which expand to code that does loads or stores.

llvm-svn: 49123

llvm-svn: 45641

out, DAGISelEmitter can compute it in its ctor, which simplifies some code.

Now we can use CodegenDAGPatterns in other parts of tblgen that want access
to dag pattern info, woo!

llvm-svn: 45636

The only difference in output is that we now print them in alphabetical 
order instead of reverse alphabetical order.

llvm-svn: 45635

llvm-svn: 45634

llvm-svn: 45633

Split the pattern parsing code out from the dag isel emitter into it's own file.

No functionality change.

llvm-svn: 45632

llvm-svn: 45419

1.
[(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
 (modify EFLAGS)]
This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
2.
def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
Similar to #1 except this is used for def : Pat patterns.

llvm-svn: 41897

llvm-svn: 37933

isel fill in the instruction operands with the 'execute always' value
automatically.

llvm-svn: 31448

llvm-svn: 30890

llvm-svn: 29893

- Clean up the code generated by tablegen:
  * AddToISelQueue now takes one argument.
  * ComplexPattern matching condition can now be shared.
  * Eliminate passing unnecessary arguments to emit routines.
  * Eliminate some unneeded SDOperand declarations in select routines.
  * Other minor clean ups.
- This reduces foot print slightly: X86ISelDAGToDAG.o is reduced from 971k
  to 823k.

llvm-svn: 29892

llvm-svn: 29548

Also reduce the number of arguments passed to emit functions and removed a
hack.

llvm-svn: 29160

code that emit target specific nodes into emit functions that are uniquified
and shared among selection routines.
e.g. This reduces X86ISelDAGToDAG.o (release) from ~2M to ~1.5M. Stack frame
size of Select_store from ~13k down to ~8k.
This is the first step. Further work to enable more sharing will follow.

llvm-svn: 29158

represent pointer type.

llvm-svn: 28363

llvm-svn: 27841

llvm-svn: 27834

intrinsics that don't take pointer arguments now work.  For example, we can
compile this:

int test3( __m128d *A) {
  return _mm_movemask_pd(*A);
}
int test4( __m128 *A) {
  return _mm_movemask_ps(*A);
}

to this:

_test3:
        movl 4(%esp), %eax
        movapd (%eax), %xmm0
        movmskpd %xmm0, %eax
        ret
_test4:
        movl 4(%esp), %eax
        movaps (%eax), %xmm0
        movmskps %xmm0, %eax
        ret

llvm-svn: 27090

emit the code to select intrinsics, but that is next :)

llvm-svn: 27082

The instruction patterns do not contain enough information to resolve the
exact type of the destination if it of a generic vector type.

llvm-svn: 26892

llvm-svn: 26890

llvm-svn: 26084

to reduce stack memory usage. This is intended to work around the gcc bug.

llvm-svn: 26026

due to ordering issue. i.e. they were selected for chain use first.
Now at load select time, check if it is being selected for a chain use and if
it has only a single real use. If so, return a HANDLENODE (with the load as
its operand) in its place and record it.
When it is folded or the load is selected for a real use, the isel records it
as the replacement for the HANDLENODE. The replacement is done when all nodes
are selected.
This scheme exposed a couple of problems where cycles can happen. (See comments
in EmitMatchCode() for descriptions of the problems and their workaround /
solutions.) These problems have been resolved with a small compile time
penality.

llvm-svn: 25995

GCC not jump-threading across this common code, and produces far nicer
output.

llvm-svn: 25762

llvm-svn: 25758

llvm-svn: 25709

llvm-svn: 25411

SNDPOutFlag to DAG nodes. These properties do not belong to target specific
instructions.
* Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's
optional. Used by ret / call, etc.

llvm-svn: 25154

llvm-svn: 25046

support which is fragile.
* Fixed a number of bugs.

llvm-svn: 24996

  either an operand or a result.
* Fixed some more flag / chain bugs.

llvm-svn: 24933