- Sep 13, 2011
-
-
Akira Hatanaka authored
tries to match a dead MipsLo node (explanation in the link below). http://article.gmane.org/gmane.comp.compilers.llvm.devel/42757/match=dagcombiner+dead llvm-svn: 139634
-
Nadav Rotem authored
llvm-svn: 139630
-
Bruno Cardoso Lopes authored
more strict about the alignment checking. This was found by inspection and I don't have any testcases so far, although the llvm testsuite runs without any problem. llvm-svn: 139625
-
Bruno Cardoso Lopes authored
to be in the VSELECT operands order, so I'll leave the fix for Nadav. llvm-svn: 139624
-
Nadav Rotem authored
xor/and/or (For example SSE2). llvm-svn: 139623
-
Akira Hatanaka authored
llvm-svn: 139622
-
Owen Anderson authored
Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. llvm-svn: 139610
-
Akira Hatanaka authored
llvm-svn: 139607
-
Owen Anderson authored
llvm-svn: 139606
-
Craig Topper authored
Only disassembler instructions with vvvv != 1111 if the instruction actually uses the vvvv field to encode an operand. Fixes PR10851. llvm-svn: 139591
-
Craig Topper authored
Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848. llvm-svn: 139588
-
Craig Topper authored
Fix encoding of VMOVDQU to not simultaneously be 'TB OpSize' and 'XS'. 'XS' is correct and seems to have been taking priority. llvm-svn: 139587
-
Eli Friedman authored
llvm-svn: 139575
-
Eli Friedman authored
Fix the assembler strings for a couple of atomic instructions. Doesn't really matter much in practice, but it's a bit cleaner. llvm-svn: 139563
-
Jim Grosbach authored
llvm-svn: 139559
-
Bruno Cardoso Lopes authored
destination types are equal! llvm-svn: 139553
-
- Sep 12, 2011
-
-
Owen Anderson authored
llvm-svn: 139542
-
Bruno Cardoso Lopes authored
llvm-svn: 139541
-
Owen Anderson authored
llvm-svn: 139537
-
Owen Anderson authored
There's no need to add additional predicate operands when converting a tB to a tBfar now. Fixes nightly test failures on armv6 Thumb. <rdar://problem/10110404> llvm-svn: 139531
-
Bruno Cardoso Lopes authored
However with this fix it does now. Basically the operand order for the x86 target specific node is not the same as the instruction, but since the intrinsic need that specific order at the instruction definition, just change the order during legalization. Also, there were some wrong invertions of condition codes, such as GE => LE, GT => LT, fix that too. Fix PR10907. llvm-svn: 139528
-
Bruno Cardoso Lopes authored
llvm-svn: 139527
-
Bruno Cardoso Lopes authored
llvm-svn: 139526
-
Bruno Cardoso Lopes authored
llvm-svn: 139525
-
Owen Anderson authored
Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered. llvm-svn: 139522
-
Richard Osborne authored
This information is required if we want LDWCP to be hoisted out of loops. llvm-svn: 139495
-
Richard Osborne authored
llvm-svn: 139494
-
Nadav Rotem authored
llvm-svn: 139491
-
Craig Topper authored
Fix disassembling of one of the register/register forms of MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877. llvm-svn: 139486
-
- Sep 11, 2011
-
-
Craig Topper authored
llvm-svn: 139485
-
Nadav Rotem authored
Undo the changes from r139285 which added custom lowering to vselect. Add tablegen lowering for vselect. llvm-svn: 139479
-
- Sep 10, 2011
-
-
Eli Friedman authored
r139454 activates an assert in a case where we were doing the right thing anyway. Make that explicit, and un-XFAIL the testcase. llvm-svn: 139458
-
Richard Trieu authored
lib/ExecutionEngine/MCJIT/MCJIT.cpp from: assert("error"); to: assert(0 && "error"); llvm-svn: 139456
-
Richard Trieu authored
assert("not implemented for target shuffle node"); to: assert(0 && "not implemented for target shuffle node"); This causes a test failure in CodeGen/X86/palignr.ll which has been marked as XFAIL for the time being. Test failure filed at PR10901. llvm-svn: 139454
-
Jim Grosbach authored
Some aliases for MOV(register) also to keep existing T1 tests happy when run in thumbv7 mode. llvm-svn: 139440
-
Owen Anderson authored
llvm-svn: 139432
-
Owen Anderson authored
llvm-svn: 139431
-
Owen Anderson authored
llvm-svn: 139429
-
Owen Anderson authored
llvm-svn: 139422
-
Akira Hatanaka authored
llvm-svn: 139421
-