llvm-svn: 72729

llvm-svn: 72712

Avoid infinite looping in AllGlobalLoadUsesSimpleEnoughForHeapSRA(). This can happen when PHI uses are recursively dependent on each other.

llvm-svn: 72710

llvm-svn: 72709

ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag.  Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.

Most targets will still produce a Flag-setting target-dependent
version when selection is done.  X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc.  This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted.  All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly.  The
same can be done on other targets.

The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.

llvm-svn: 72707

llvm-svn: 72706

llvm-svn: 72705

llvm-svn: 72699

llvm-svn: 72698

llvm-svn: 72697

llvm-svn: 72696

RewriteStoreUserOfWholeAlloca deal with tail padding because 
isSafeUseOfBitCastedAllocation expects them to.  Otherwise, we crash 
trying to erase the bitcast.

llvm-svn: 72688

metadata references non-Constant values such as instructions.

llvm-svn: 72685

llvm-svn: 72668

llvm-svn: 72667

a single predecessor.

Patch by Jakub Staszak.

llvm-svn: 72661

llvm-svn: 72659

it is used both when a result is illegal and when an
operand is illegal.

llvm-svn: 72658

llvm-svn: 72650

JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631

Benjamin Kramer!

llvm-svn: 72625

llvm-svn: 72618

llvm-svn: 72610

added in clang.

llvm-svn: 72606

llvm-svn: 72604

llvm-svn: 72593

llvm-svn: 72589

invoke results (see the testcases).  Tighten up the checking.

llvm-svn: 72586

llvm-svn: 72577

is, otherwise we get a <badref>.

llvm-svn: 72567

This is useful when trying to figure out why GVN didn't eliminate redundant
loads.

llvm-svn: 72565

Diagnosis and patch thanks to Jakub Staszak.

llvm-svn: 72562

llvm-svn: 72558

llvm-svn: 72557

decoding. Essentially, they both map to the same column in the "opcode
extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm
complicates decoding this.

Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code
emitter special case these, a la [SML]FENCE.

llvm-svn: 72556

This patch removes some special cases for opcodes and does a bit of 
cleanup.

llvm-svn: 72536

llvm-svn: 72535

llvm-svn: 72534

llvm-svn: 72533

llvm-svn: 72531