LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.

llvm-svn: 132033

llvm-svn: 132030

method exposed by the test. While we're at it, simplify the .seh_proc
parsing method.

llvm-svn: 132028

Enable the parsing of the operand "cpsr_all" for the ARM msr instruction

llvm-svn: 132026

llvm-svn: 132025

Part of rdar://9119939

llvm-svn: 132024

Part of rdar://9119939

llvm-svn: 132023

case of a switch instruction. Back off this optimization when this would
eliminate all of the predecessors to the latch.

Sorry, I am unable to reduce a reasonably sized test case.

rdar://9486843

llvm-svn: 132022

do.

Part of rdar://9119939.

llvm-svn: 132015

Fixes part of rdar://9444657

llvm-svn: 132011

this test.

llvm-svn: 132004

offsets that are larger than 0x10000.

llvm-svn: 132003

Change condition for determining whether a function is small for inlining metrics so that very long functions
with few basic blocks are not re-analyzed.

llvm-svn: 131994

Add a size alignment check to the .seh_stackalloc directive parser. Add a
more descriptive error message to the .seh_handler directive parser.

Add methods to the TargetAsmInfo struct in support of all this.

llvm-svn: 131992

deficiencies exist:

- Works only if ABI is o32.
- Zero-sized structures cannot be passed.
- There is a lot of redundancy in generated code.

llvm-svn: 131986

Make instcombine O(N) instead of O(N^2) in code where the same simplifiable constant is used many times.
Part of rdar://9471075.

llvm-svn: 131979

llvm-svn: 131974

after checking for a GEP, so that it matches what GetUnderlyingObject
does. This fixes an obscure bug turned up by bugpoint in the testcase
for PR9931.

llvm-svn: 131971

scheme uses internally. Implement it for x86 (the only architecture that LLVM
supports for which this matters right now).

llvm-svn: 131969

llvm-svn: 131956

promoting allocas to SSA variables. Fixes <rdar://problem/9479036>.

llvm-svn: 131953

llvm-svn: 131952

llvm-svn: 131951

  non-zero.
- Teach X86 cmov optimization to eliminate the cmov from ctlz, cttz extension
  when the source of X86ISD::BSR / X86ISD::BSF is proven to be non-zero.

rdar://9490949

llvm-svn: 131948

variable arguments in LowerCall and LowerFormalArguments. This should also fix
the bug in which handling of variable arguments is incorrect when the front-end
optimizes away unused fixed arguments.

llvm-svn: 131942

llvm-svn: 131940

llvm-svn: 131936

llvm-svn: 131928

llvm-svn: 131927

llvm-svn: 131926

llvm-svn: 131922

This fixes PR9845.

llvm-svn: 131919

llvm-svn: 131918

in MipsFunctionInfo that are no longer used.

llvm-svn: 131917

llvm-svn: 131916

The following improvements are accomplished as a result of applying this patch:
- Fixed frame objects' offsets (relative to either the virtual frame pointer or
  the stack pointer) are set before instruction selection is completed. There is
  no need to wait until Prologue/Epilogue Insertion is run to set them.
- Calculation of final offsets of fixed frame objects is straightforward. It is
  no longer necessary to assign negative offsets to fixed objects for incoming
  arguments in order to distinguish them from the others.
- Since a fixed object has its relative offset set during instruction
  selection, there is no need to conservatively set its alignment to 4.
- It is no longer necessary to reorder non-fixed frame objects in 
  MipsFrameLowering::adjustMipsStackFrame.

llvm-svn: 131915

Patch by Micah Villmow

llvm-svn: 131908

llvm-svn: 131907

llvm-svn: 131906

I haven't implemented any of the ones that take registers yet. The problem is
that for x86-64 the streamer methods expect a native x86 register number (note:
%r8-%r15 want 8-15 instead of 0-7; same for %xmm8-%xmm15). I haven't figured
out exactly how I want to do that yet.

llvm-svn: 131899