llvm-svn: 126488

Yes, there are other types than i8* and GEPs on them can produce an add+multiply.
We don't consider that cheap enough to be speculatively executed.

llvm-svn: 126481

llvm-svn: 126477

llvm-svn: 126471

llvm-svn: 126467

is possible to do better if the high bit is set in either KnownZero/KnownOne, but
in practice NumSignBits is always 1 when we are zero extending because nothing
is known about that register.

llvm-svn: 126465

actually larger.

llvm-svn: 126464

llvm-svn: 126463

D registers since the vpush list may not have gaps. Make sure the stack
adjustment instruction isn't moved between them. Ditto for vpop in
epilogues.

Sorry, can't reduce a small test case.
rdar://9043312

llvm-svn: 126457

llvm-svn: 126452

New live ranges are assigned in long -> short order, but live ranges that have
been evicted at least once are deferred and assigned in short -> long order.

Also disable splitting and spilling for live ranges seen for the first time.

The intention is to create a realistic interference pattern from the heavy live
ranges before starting splitting and spilling around it.

llvm-svn: 126451

llvm-svn: 126450

llvm-svn: 126445

Introduce a variable in the AsmParserExtension whether [] is valid in an
expression. If it is true, parse them like (). Enable this for ELF only.

llvm-svn: 126443

llvm-svn: 126441

Patch by Nathan Jeffords!

llvm-svn: 126425

Limit the folding of any_ext and sext  into the load operation to scalars.
Limit the active-bits trunc optimization to scalars.
Document vector trunc and vector sext in LangRef.

Similar to commit 126080 (for enabling zext).

llvm-svn: 126424

The problem was codegen guessing the wrong values and printing

	.section	.eh_frame,"aMS",@progbits,4

It is not clear at all if Codegen should try to guess, MC is the
one that should know the default flags.

llvm-svn: 126421

llvm-svn: 126398

llvm-svn: 126397

llvm-svn: 126384

- Don't leak parsed operands during tokenization.
- Don't leak printed insts in llvm-mc.

llvm-svn: 126381

registers at phis. This enables us to eliminate a lot of pointless zexts during
the DAGCombine phase. This fixes <rdar://problem/8760114>.

llvm-svn: 126380

llvm-svn: 126379

a block is visited before all of its predecessors.

llvm-svn: 126378

llvm-svn: 126377

and make the actual map private.

llvm-svn: 126376

allows for the information propagated across basic blocks to be merged at phis.

llvm-svn: 126375

trivial places.  This pass needs a lot of work.

llvm-svn: 126367

to reduce nesting.  This needs to be turned into a table.

llvm-svn: 126366

function prototype into a call to a varargs prototype.  We do
allow the xform if we have a definition, but otherwise we don't
want to risk that we're changing the abi in a subtle way.  On
X86-64, for example, varargs require passing stuff in %al.

llvm-svn: 126363

operands starts at index 2, not 1.
rdar://9045024
PR9305

llvm-svn: 126359

register.

This avoids some silly stack slot shuffling when both sides of a copy get
spilled.

llvm-svn: 126353

Use DW_FORM_data2 for DW_AT_language and let users use DW_LANG_lo_user=0x8000 to DW_LANG_hi_user=0xffff range.

llvm-svn: 126339

enabled for all targets. Non-X86 targets should not have this behavior
enabled by default.

Joerg, if you would like to resubmit with the behavior conditionalized to be
X86-ELF only, that's fine.

llvm-svn: 126336

Fixes PR9292.

llvm-svn: 126330

llvm-svn: 126322

events on the thread and wait until a resource is ready to event. The vector
of the resource that is ready is returned.

llvm-svn: 126320

No code will be inserted after the split point anyway.

llvm-svn: 126319

llvm-svn: 126315