[AArch64] Remove dead tryMLAV64LaneV128 and tryMULLV64LaneV128 code.

As far as I can tell this code is never used, as the pattern recognised by
checkHighLaneIndex (an duplane with insert_subvec and extract_subvec) will not
be generated any more. There are no tests that change from removing it
(including the clang neon tests), and it didn't appear to come up in any
benchmarks I ran. There are already existing tablegen patterns for MLA with
index and s/umull with index.

Removing it also prevents it from causing problems for SVE, as in #62151.

Differential Revision: https://reviews.llvm.org/D148646