Skip to content
Commit 4f663a63 authored by Matt Arsenault's avatar Matt Arsenault
Browse files

AMDGPU/GlobalISel: RegBankSelect tbuffer load/store 

These have the same operand structure as the non-t buffer operations.

llvm-svn: 372296
parent c15aa241
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment