Commits · 32837a60ac4ff43182699073729daed2cd0ed421 · Roger Ferrer / llvm-epi · GitLab

Oct 27, 2019
- [SDAG] fold insert_vector_elt with undef index · 85a2146c
  Sanjay Patel authored Oct 27, 2019
  85a2146c
- [LegalizeTypes] When promoting BITREVERSE/BSWAP don't take the shift amount... · f067dd83
  Craig Topper authored Oct 27, 2019
  f067dd83
- [TargetLowering] Add getBooleanContents contents check to "SETCC (SETCC),... · 73f255b8
  Craig Topper authored Oct 27, 2019
  73f255b8
- [MCA] Fix a spelling mistake in a comment. NFC · 4640223e
  Greg Bedwell authored Oct 27, 2019
  
  4640223e
- [X86] Only look up boolean reduction cost tables if the reduction is not pairwise. · 1ce8a5b3
  Craig Topper authored Oct 26, 2019
  1ce8a5b3
Oct 26, 2019
- [APInt] Introduce APIntOps::GetMostSignificantDifferentBit() · 9d77ad57
  Roman Lebedev authored Oct 26, 2019
  9d77ad57
- [X86] Prefer KORTEST on Knights Landing or later for memcmp() · 11c92020
  David Zarzycki authored Oct 17, 2019
  11c92020
- [ObjectYAML] - Do not use auto. NFC. · 073ab70b
  Georgii Rymar authored Oct 26, 2019
  073ab70b
- [AMDGPU] Fix Vreg_1 PHI lowering in SILowerI1Copies. · e921ede5
  cdevadas authored Oct 26, 2019
  e921ede5
- [X86][GISel] Fix typo in comment. NFC · a6a37e82
  Craig Topper authored Oct 25, 2019
  
  a6a37e82
- Add Record::getValueAsOptionalDef(). · 27e2c8fa
  John McCall authored Oct 25, 2019
  27e2c8fa
- [SDAG] fold extract_vector_elt with undef index · 4c476176
  Sanjay Patel authored Oct 25, 2019
  4c476176
- [AMDGPU] Enable SGPR copy folding · 4c0251da
  Stanislav Mekhanoshin authored Oct 25, 2019
  4c0251da
Oct 25, 2019
- [BPF] fix a CO-RE issue with -mattr=+alu32 · a27c998c
  Yonghong Song authored Oct 24, 2019
  a27c998c
- Revert "[ARM] Uses "Sun Style" syntax for section switching" · a6b0219f
  Jian Cai authored Oct 25, 2019
  a6b0219f
- [AMDGPU] Fixed asan failure in SIFoldOperands · c7dcacf1
  Stanislav Mekhanoshin authored Oct 25, 2019
  c7dcacf1
- GlobalISel: Implement widenScalar for G_INSERT_VECTOR_ELT · 1a276d1e
  Matt Arsenault authored Oct 01, 2019
  
  1a276d1e
- [Alignment][NFC] Convert AllocaInst to MaybeAlign · e8a0a090
  Guillaume Chatelet authored Oct 25, 2019
  e8a0a090
- [ARM] Uses "Sun Style" syntax for section switching · 03de2f84
  Jian Cai authored Oct 25, 2019
  03de2f84
- AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG · 171cf530
  Matt Arsenault authored Oct 08, 2019
  171cf530
- AMDGPU: Fix the broken dominator tree when creating waterfall loop for resource descriptor · 1ce552f3
  Changpeng Fang authored Oct 25, 2019
  1ce552f3
- Revert "Add an instruction marker field to the ExtraInfo in MachineInstrs." · 64c1f660
  Amy Huang authored Oct 25, 2019
  64c1f660
- [LLD][ThinLTO] Handle GUID collision in import global processing · cc0b9647
  Teresa Johnson authored Oct 25, 2019
  cc0b9647
- [Alignment][NFC] getMemoryOpCost uses MaybeAlign · a4783ef5
  Guillaume Chatelet authored Oct 22, 2019
  a4783ef5
- [AMDGPU] Fold AGPR reg_sequence initializers · d4303b38
  Stanislav Mekhanoshin authored Oct 24, 2019
  d4303b38
- [AMDGPU] Disallow dpp combining for dpp instructions without Src2 operand (when Src2 is required) · c9c18e5a
  vpykhtin authored Oct 25, 2019
  c9c18e5a
- [X86] Add a check for SSE2 to the top of combineReductionToHorizontal. · 3dd0a896
  Craig Topper authored Oct 24, 2019
  3dd0a896
- [DAGCombiner] widen zext of popcount based on target support · e6c145e0
  Sanjay Patel authored Oct 25, 2019
  e6c145e0
- AMDGPU/GlobalISel: Legalize FDIV16 · c35b358b
  Austin Kerbow authored Oct 22, 2019
  c35b358b
- Add an instruction marker field to the ExtraInfo in MachineInstrs. · b85b4e5a
  Amy Huang authored Oct 16, 2019
  b85b4e5a
- [SLP] adjust code comment; NFC · b82fa80e
  Sanjay Patel authored Oct 24, 2019
  b82fa80e
- [APInt] Add saturating left-shift ops · 1cc8e1e1
  Roman Lebedev authored Oct 25, 2019
  1cc8e1e1
- [APInt] Add saturating multiply ops · b2c18445
  Roman Lebedev authored Oct 25, 2019
  b2c18445
- [CodeGen][SelectionDAG] Fix tiny bug in ExpandIntRes_UADDSUBO · 59a51d84
  Itay Bookstein authored Oct 25, 2019
  59a51d84
- [RISCV] Add support for half-precision floats · 1baa5039
  Luís Marques authored Oct 25, 2019
  1baa5039
- [MIPS GlobalISel] Select MSA vector generic and builtin fsqrt · 417dd678
  Petar Avramovic authored Oct 25, 2019
  417dd678
- [yaml2obj, obj2yaml] - Add support for SHT_NOTE sections. · de3cef1d
  georgerim authored Oct 25, 2019
  de3cef1d
- Fix a variable typo in LiveDebugValues [NFC] · 2a3dc6b7
  David Stenberg authored Oct 25, 2019
  
  2a3dc6b7
- [PowerPC] [Peephole] fold frame offset by using index form to save add. · 82205914
  czhengsz authored Oct 25, 2019
  82205914
- [LiveDebugValues] Small code clean up; NFC · 8c99a549
  Djordje Todorovic authored Oct 24, 2019
  
  8c99a549