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  1. Feb 22, 2019
    • David Greene's avatar
      [CMake] Honor LLVM_EXTERNAL_<proj>_SOURCE_DIR · 3b9141df
      David Greene authored
      When LLVM_ENABLE_PROJECTS is set, CMake assumes the project
      directories are all side-by-side. This is not always the case and
      there's no reason to expect it if LLVM_EXTERNAL_<proj>_SOURCE_DIR is
      set. Honor that setting if it exists and allow the build configuration
      to continue.
      
      Differential Revision: https://reviews.llvm.org/D49672
      
      llvm-svn: 354693
      3b9141df
    • Daniel Sanders's avatar
      Restore ability for C++ API users to Enable IPRA. · 07cda257
      Daniel Sanders authored
      Summary:
      Prior to r310876 one of our out-of-tree targets was enabling IPRA by modifying
      the TargetOptions::EnableIPRA. This no longer works on current trunk since the
      useIPRA() hook overrides any values that are set in advance. This patch adjusts
      the behaviour of the hook so that API users and useIPRA() can both enable it
      but useIPRA() cannot disable it if the API user already enabled it.
      
      Reviewers: arsenm
      
      Reviewed By: arsenm
      
      Subscribers: wdng, mgorny, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D38043
      
      llvm-svn: 354692
      07cda257
    • Louis Dionne's avatar
      [clang] Only provide C11 features in <float.h> starting with C++17 · c2d95792
      Louis Dionne authored
      Summary:
      In r353970, I enabled those features in C++11 and above. To be strictly
      conforming, those features should only be enabled in C++17 and above.
      
      Reviewers: jfb, eli.friedman
      
      Subscribers: jkorous, dexonsmith, libcxx-commits
      
      Differential Revision: https://reviews.llvm.org/D58289
      
      llvm-svn: 354691
      c2d95792
    • Alexey Bataev's avatar
      [OPENMP] Delayed diagnostics for VLA support. · e69f94e0
      Alexey Bataev authored
      Generalized processing of the deferred diagnostics for OpenMP/CUDA code.
      
      llvm-svn: 354690
      e69f94e0
    • Sanjay Patel's avatar
      [CGP] move overflow intrinsic insertion to common location; NFCI · ffe1cf5e
      Sanjay Patel authored
      We need to enhance the uaddo matching to handle special-cases
      as seen in PR40486 and PR31754. That means we won't necessarily
      have a def-use pattern, so we'll need to check dominance to
      determine where to place the intrinsic (as we already do for
      usubo). This preliminary patch is just rearranging the code,
      so the planned follow-up to improve uaddo will be more clear.
      
      llvm-svn: 354689
      ffe1cf5e
    • Matt Arsenault's avatar
      MIR: Preserve incoming frame index numbers · 7b55066a
      Matt Arsenault authored
      Don't skip incrementing the frame index number
      if the object is dead. Instructions can still be
      referencing the old frame index number, and this
      doesn't attempt to remap those. The resulting
      MIR then fails to load because the use instructions
      use a higher frame index number than recorded
      list of stack objects.
      
      I'm not sure it's possible to craft a testcase
      with the existing set of passes. It requires
      selectively marking some stack objects
      dead in an essentially random order.
      StackSlotColoring condenses towards
      the low indexes. This avoids a regression in a
      future AMDGPU commit when some frame indexes
      are lowered separately from PEI.
      
      llvm-svn: 354688
      7b55066a
    • Matt Arsenault's avatar
      CodeGen: Make RegAllocRegistry a template class · 6d05d6a7
      Matt Arsenault authored
      Will allow re-using the machinery for independent
      sets of register allocators.
      
      This will allow AMDGPU to use separate command line
      options for the allocator to use for SGPRs separate
      from VGPRs.
      
      llvm-svn: 354687
      6d05d6a7
    • Matt Arsenault's avatar
      AMDGPU: Use removeAllRegUnitsForPhysReg · 476e26b5
      Matt Arsenault authored
      llvm-svn: 354686
      476e26b5
    • Matt Arsenault's avatar
      LiveIntervals: Add removeAllRegUnitsForPhysReg · 45cfe982
      Matt Arsenault authored
      Convenience wrapper for removing the reg units of
      a physical register.
      
      llvm-svn: 354685
      45cfe982
    • Sam Clegg's avatar
      [WebAssembly] Remove debug statement submitted in rL354657 · a5e68748
      Sam Clegg authored
      Subscribers: dschuff, jgravelle-google, hiraditya, aheejin, sunfish, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D58549
      
      llvm-svn: 354684
      a5e68748
    • Mitch Phillips's avatar
      [GN] Updated build file to allow GN builds to succeed at ToT. · cb0c05cb
      Mitch Phillips authored
      llvm-svn: 354683
      cb0c05cb
    • Guozhi Wei's avatar
      [MBP] Factor out function hasViableTopFallthrough and enhancement · 4c8e4803
      Guozhi Wei authored
      This patch factor out the function hasViableTopFallthrough from rotateLoop. It is also enhanced. Original code checks only if there is a block can be placed before current loop top. This patch also checks if the loop top is the most possible successor of its predecessor. The attached test case shows its effect.
      
      Differential Revision: https://reviews.llvm.org/D58393
      
      llvm-svn: 354682
      4c8e4803
    • Simon Pilgrim's avatar
      Fix "not all control paths return" warning. NFCI. · 5d049ce5
      Simon Pilgrim authored
      llvm-svn: 354681
      5d049ce5
    • Alexey Bataev's avatar
      Revert "[OPENMP] Delayed diagnostics for VLA support." · bbd5c55c
      Alexey Bataev authored
      This reverts commit r354679 to fix the problem with the Windows
      buildbots
      
      llvm-svn: 354680
      bbd5c55c
    • Alexey Bataev's avatar
      [OPENMP] Delayed diagnostics for VLA support. · b09bcf8e
      Alexey Bataev authored
      Generalized processing of the deferred diagnostics for OpenMP/CUDA code.
      
      llvm-svn: 354679
      b09bcf8e
    • Saleem Abdulrasool's avatar
      CodeGen: use COMDAT for block copy/destroy helpers · 89628927
      Saleem Abdulrasool authored
      SVN r339438 added support to deduplicate the helpers by using a consistent
      naming scheme and using LinkOnceODR semantics.  This works on ELF by means of
      weak linking semantics, and entirely does not work on PE/COFF where you end up
      with multiply defined strong symbols, which is a strong error on PE/COFF.
      Assign the functions a COMDAT group so that they can be uniqued by the linker.
      This fixes the use of blocks in CoreFoundation on Windows.
      
      llvm-svn: 354678
      89628927
    • Nirav Dave's avatar
      Disable big-endian constant store merges from rL354676. · 46f939c1
      Nirav Dave authored
      llvm-svn: 354677
      46f939c1
    • Nirav Dave's avatar
      [DAGCombine] Fold overlapping constant stores · 44037d7a
      Nirav Dave authored
      Fold a smaller constant store into larger constant stores immediately
      preceeding it.
      
      Reviewers: rnk, courbet
      
      Subscribers: javed.absar, hiraditya, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D58468
      
      llvm-svn: 354676
      44037d7a
    • Sanjay Patel's avatar
      [x86] allow narrowing of vector UINT_TO_FP · a9e28917
      Sanjay Patel authored
      As discussed in:
      D56864
      D58197
      
      Always use the narrow (128-bit) instruction when possible.
      We already had the signed int version of this transform.
      
      llvm-svn: 354675
      a9e28917
    • Sanjay Patel's avatar
      [x86] simplify code in combineExtractSubvector; NFC · 1baf7896
      Sanjay Patel authored
      Only the 1st fold is attempted pre-legalization, but it requires
      legal (simple) types too, so we don't need an EVT in any of the code.
      
      llvm-svn: 354674
      1baf7896
    • Matt Arsenault's avatar
      BreakCriticalEdges: Update PostDominatorTree · 65b4ab99
      Matt Arsenault authored
      llvm-svn: 354673
      65b4ab99
    • Petar Jovanovic's avatar
      [mips][micromips] fix filling delay slots for PseudoIndirectBranch_MM · 6083106b
      Petar Jovanovic authored
      Filling a delay slot in 32bit jump instructions with a 16bit instruction
      can cause issues. According to the documentation such an operation is
      unpredictable.
      This patch adds opcode Mips::PseudoIndirectBranch_MM alongside
      Mips::PseudoIndirectBranch and other instructions that are expanded to jr
      instruction and do not allow a 16bit instruction in their delay slots.
      
      Patch by Mirko Brkusanin.
      
      Differential Revision: https://reviews.llvm.org/D58507
      
      llvm-svn: 354672
      6083106b
    • Alexey Bataev's avatar
      [CUDA]Delayed diagnostics for the asm instructions. · 3167b303
      Alexey Bataev authored
      Adapted targetDiag for the CUDA and used for the delayed diagnostics in
      asm constructs. Works for both host and device compilation sides.
      
      Differential Revision: https://reviews.llvm.org/D58463
      
      llvm-svn: 354671
      3167b303
    • Roman Tereshin's avatar
      [LowerSwitch][AMDGPU] Do not handle impossible values · 99a6672b
      Roman Tereshin authored
      This patch adds LazyValueInfo to LowerSwitch to compute the range of the
      value being switched over and reduce the size of the tree LowerSwitch
      builds to lower a switch.
      
      Reviewed By: arsenm
      
      Differential Revision: https://reviews.llvm.org/D58096
      
      llvm-svn: 354670
      99a6672b
    • Chijun Sima's avatar
      [DTU] Refine the interface and logic of applyUpdates · 70e97163
      Chijun Sima authored
      Summary:
      This patch separates two semantics of `applyUpdates`:
      1. User provides an accurate CFG diff and the dominator tree is updated according to the difference of `the number of edge insertions` and `the number of edge deletions` to infer the status of an edge before and after the update.
      2. User provides a sequence of hints. Updates mentioned in this sequence might never happened and even duplicated.
      
      Logic changes:
      
      Previously, removing invalid updates is considered a side-effect of deduplication and is not guaranteed to be reliable. To handle the second semantic, `applyUpdates` does validity checking before deduplication, which can cause updates that have already been applied to be submitted again. Then, different calls to `applyUpdates` might cause unintended consequences, for example,
      ```
      DTU(Lazy) and Edge A->B exists.
      1. DTU.applyUpdates({{Delete, A, B}, {Insert, A, B}}) // User expects these 2 updates result in a no-op, but {Insert, A, B} is queued
      2. Remove A->B
      3. DTU.applyUpdates({{Delete, A, B}}) // DTU cancels this update with {Insert, A, B} mentioned above together (Unintended)
      ```
      But by restricting the precondition that updates of an edge need to be strictly ordered as how CFG changes were made, we can infer the initial status of this edge to resolve this issue.
      
      Interface changes:
      The second semantic of `applyUpdates`  is separated to `applyUpdatesPermissive`.
      These changes enable DTU(Lazy) to use the first semantic if needed, which is quite useful in `transforms/utils`.
      
      Reviewers: kuhar, brzycki, dmgreen, grosser
      
      Reviewed By: brzycki
      
      Subscribers: hiraditya, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D58170
      
      llvm-svn: 354669
      70e97163
    • Pavel Labath's avatar
      Avoid two-stage initialization of MinidumpParser · ab86d3da
      Pavel Labath authored
      remove the Initialize function, move the things that can fail into the
      static factory function. The factory function now returns
      Expected<Parser> instead of Optional<Parser> so that it can give a
      reason why creation failed.
      
      llvm-svn: 354668
      ab86d3da
    • David Green's avatar
      [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs · acb628b2
      David Green authored
      This adds a number of missing Thumb1 opcodes so that the peephole optimiser can
      remove redundant CMP instructions.
      
      Reapplying this after the first attempt broke non-thumb1 code as the t2ADDri
      instruction can be used with frame indices. In thumb1 we use tADDframe.
      
      Differential Revision: https://reviews.llvm.org/D57833
      
      llvm-svn: 354667
      acb628b2
    • James Henderson's avatar
      [ELF][test]Remove unnecessary empty symbol references in yaml/add missing symbols for relocs · 0cc32dd4
      James Henderson authored
      yaml2obj used to require the Symbol field in relocations, but it hasn't
      done so for a couple of years. Another change to yaml2obj will soon land
      that will look up the symbol by name or index, if present, and emit an
      error if not found. This will mean that an explicit symbol reference
      (even to an empty-named symbol) that does not reference a symbol
      declared in the yaml will result in an error.
      
      This patch updates tests that would otherwise start emitting errors.
      
      Reviewed by: ruiu, grimar
      
      Differential Revision: https://reviews.llvm.org/D58508
      
      llvm-svn: 354666
      0cc32dd4
    • Diana Picus's avatar
      [ARM GlobalISel] Support floating point for Thumb2 · 35e1c666
      Diana Picus authored
      This is exactly the same as arm mode, so for the instruction selector
      tests we just extract them to a new file and run with the same checks
      for both arm and thumb mode.
      
      For the legalizer we need to update the tests for soft float a bit, but
      only because BL and tBL are slightly different. We could be pedantic and
      check that we get a well-formed BL for arm mode and a tBL for thumb, but
      for the purposes of the legalizer test it's sufficient to just skip over
      the predicate operands in the checks. Also note that we have the
      pedantic checks in the divmod test, so we're covered.
      
      llvm-svn: 354665
      35e1c666
    • Haojian Wu's avatar
      [clangd] Don't attach FixIt to the source code in macro. · c8f74962
      Haojian Wu authored
      Summary:
      We are less certain it is the correct fix. Also, clang doesn't apply FixIt to
      the source code in macro.
      
      Reviewers: ilya-biryukov
      
      Reviewed By: ilya-biryukov
      
      Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
      
      Tags: #clang
      
      Differential Revision: https://reviews.llvm.org/D58525
      
      llvm-svn: 354664
      c8f74962
    • George Rimar's avatar
      Fix BB after r354661 · d22686b6
      George Rimar authored
      Update 2 test cases after obj2yaml fix in r354661.
      
      llvm-svn: 354663
      d22686b6
    • Pavel Labath's avatar
      Split up minidump register context tests · d7fd9573
      Pavel Labath authored
      The tests were doing two somewhat independent things:
      - checking that the registers can be retrieved from the minidump file
      - checking that they can be converted into a form suitable for
        consumption by lldb
      
      The first thing requires a minidump file (but it's independent of other
      lldb structures), while the second one does not require a minidump file
      (but it needs lldb register info structures).
      
      Splitting this into two tests gives an opportunity to write more
      detailed tests, and allows the two pieces of functionality to be moved
      into different packages, if that proves to be necessary.
      
      llvm-svn: 354662
      d7fd9573
    • George Rimar's avatar
      [obj2yaml] - Do not miss section index for special symbols. · 11358dd6
      George Rimar authored
      This fixes https://bugs.llvm.org/show_bug.cgi?id=40786 
      ("obj2yaml symbol output missing section index for SHN_ABS and SHN_COMMON symbols")
      
      Since SHN_ABS and SHN_COMMON symbols are special, we should preserve
      the st_shndx for them. The patch does this for them and the other special symbols.
      
      The test case is based on the test provided by James Henderson at the bug page!
      
      Differential revision: https://reviews.llvm.org/D58498
      
      llvm-svn: 354661
      11358dd6
    • Alina Sbirlea's avatar
      [MemorySSA] Update test with minimized one. NFCI · 15110078
      Alina Sbirlea authored
      llvm-svn: 354658
      15110078
    • Heejin Ahn's avatar
      [WebAssembly] Remove getBottom function from CFGStackify (NFC) · 85631d8b
      Heejin Ahn authored
      Summary:
      This removes `getBottom` function and the bookeeping map of <begin
      marker instruction, bottom BB>.
      
      Reviewers: dschuff
      
      Subscribers: sunfish, sbc100, jgravelle-google, jdoerfert, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D58319
      
      llvm-svn: 354657
      85631d8b
    • Alina Sbirlea's avatar
      [MemorySSA & LoopPassManager] Resolve PR40038. · 90d2e3a1
      Alina Sbirlea authored
      The correct edge being deleted is not to the unswitched exit block, but to the
      original block before it was split. That's the key in the map, not the
      value.
      The insert is correct. The new edge is to the .split block.
      
      The splitting turns OriginalBB into:
      OriginalBB -> OriginalBB.split.
      Assuming the orignal CFG edge: ParentBB->OriginalBB, we must now delete
      ParentBB->OriginalBB, not ParentBB->OriginalBB.split.
      
      llvm-svn: 354656
      90d2e3a1
    • Craig Topper's avatar
      [LegalizeVectorOps] Improve the placement of ANDs in the ExpandLoad path for non-byte-sized loads. · fa6187d2
      Craig Topper authored
      When we need to merge two adjacent loads the AND mask for the low piece was still sized for the full src element size. But we didn't have that many bits. The upper bits are already zero due to the SRL. So we can skip the AND if we're going to combine with the high bits.
      
      We do need an AND to clear out any bits from the high part. We were anding the high part before combining with the low part, but it looks like ANDing after the OR gets better results.
      
      So we can just emit the final AND after the optional concatentation is done. That will handling skipping before the OR and get rid of extra high bits after the OR.
      
      llvm-svn: 354655
      fa6187d2
    • Craig Topper's avatar
      [LegalizeVectorOps] Simplify the non-byte sized load handling VectorLegalizer::ExpandLoad. NFCI · 069cf05e
      Craig Topper authored
      Remove an if that should always be true. Merge the body of another into the only block that could make the if true.
      
      llvm-svn: 354654
      069cf05e
    • Craig Topper's avatar
      [X86] Add test cases to cover the path in VectorLegalizer::ExpandLoad for... · 0ca023b3
      Craig Topper authored
      [X86] Add test cases to cover the path in VectorLegalizer::ExpandLoad for non-byte sized loads where bits from two loads need to be concatenated.
      
      If the scalar type doesn't divide evenly into the WideVT then the code will need to take some bits from adjacent scalar loads and combine them.
      
      But most of our testing is for i1 element type which always divides evenly.
      
      llvm-svn: 354653
      0ca023b3
    • Chijun Sima's avatar
      [DTU] Deprecate insertEdge*/deleteEdge* · f131d611
      Chijun Sima authored
      Summary: This patch converts all existing `insertEdge*/deleteEdge*` to `applyUpdates` and marks `insertEdge*/deleteEdge*` as deprecated.
      
      Reviewers: kuhar, brzycki
      
      Reviewed By: kuhar, brzycki
      
      Subscribers: hiraditya, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D58443
      
      llvm-svn: 354652
      f131d611
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