llvm-svn: 272701

No functional change is intended.

llvm-svn: 270952

This fixes PR26675.

llvm-svn: 261388

llvm-svn: 250301

Add intrinsics for the
  XSAVE instructions (XSAVE/XSAVE64/XRSTOR/XRSTOR64)
  XSAVEOPT instructions (XSAVEOPT/XSAVEOPT64)
  XSAVEC instructions (XSAVEC/XSAVEC64)
  XSAVES instructions (XSAVES/XSAVES64/XRSTORS/XRSTORS64)

Differential Revision: http://reviews.llvm.org/D13014

llvm-svn: 250158

Before, clang's internal assembler would reject the inline asm in clang's
Intrin.h.  To make sure this doesn't happen for other Intrin.h functions using
__asm__ blocks, add 32-bit and 64-bit codegen tests for Intrin.h.

Sadly, these tests discovered that __readcr3 and __writecr3 have bad
implementations in 64-bit builds.  This will have to be fixed in a follow-up.

llvm-svn: 248234

As discussed in PR23648 - the intrinsics _m_from_int, _m_to_int and _m_prefetch are defined in mmintrin.h and prfchwintrin.h so we don't need to in Intrin.h

Added tests for _m_from_int and _m_to_int

D11338 already added a test for _m_prefetch

Differential Revision: http://reviews.llvm.org/D12272

llvm-svn: 245975

llvm-svn: 245929

_rotl, _rotwl and _lrotl (and their right-shift counterparts) are official x86
intrinsics, and should be supported regardless of environment. This is in contrast
to _rotl8, _rotl16, and _rotl64 which are MS-specific.

Note that the MS documentation for _lrotl is different from the Intel 
documentation. Intel explicitly documents it as a 64-bit rotate, while for MS,
since sizeof(unsigned long) for MSVC is always 4, a 32-bit rotate is implied.

Differential Revision: http://reviews.llvm.org/D12271

llvm-svn: 245923

_ReadBarrier, _WriteBarrier, and _ReadWriteBarrier are essentially
memory barriers of one form or another.  Model these as
atomic_signal_fence(ATOMIC_SEQ_CST).

__faststorefence is a curious intrinsic.  It's single purpose seems to
an alternative to mfence when that instruction is slow.  However, mfence
is not always slow and is, in general, preferable to a 'lock or'
sequence on certain CPUs.  Give the compiler freedom to select the best
sequence to get a fence.

llvm-svn: 242378

No functionality change is intended.

llvm-svn: 242087

No functionality change intended.

llvm-svn: 242086

The program is permitted to have stuff like '#define x' in it so avoid
using identifiers not reserved for the implementation.

llvm-svn: 242010

Three things:
- The atomic intrinsics mandate memory barriers, let's start emitting
  some.
- We don't need to manually create RMW operations, we can just do
  __atomic_fetch_foo instead of performing __atomic_foo_fetch and
  undoing foo.
- Don't use inline assembly, we don't need it for these intrinsics.

This fixes PR24101.

llvm-svn: 242009

llvm-svn: 241065

Add intrinsics for the FXSR instructions (FXSAVE/FXSAVE64/FXRSTOR/FXRSTOR64)

These were previously declared in Intrin.h for MSVC compatibility, but now
that we have them implemented, these declarations can be removed.

llvm-svn: 241053

Saves some typing and if someone wants to change them it makes it much easier.

llvm-svn: 239782

This change was unrelated to r239170.

llvm-svn: 239176

We would crash in the DeclPrinter trying to pretty-print the
static_assert message.  C++1z-style assertions don't have a message so
we would crash.

This fixes PR23756.

llvm-svn: 239170

Instead of using 'unavailable', use '__unavailable__'

llvm-svn: 228087

Users expect to be able to use this with _xgetbv.

llvm-svn: 227270

Use the same approach as _umul128, but just return the high half.

llvm-svn: 223316

llvm-svn: 223179

llvm-svn: 223176

Implement _umul128; it provides the high and low halves of a 128-bit
multiply.  We can simply use our __int128 arithmetic to implement this,
we generate great code for it:
        movq    %rdx, %rax
        mulq    %rcx
        movq    %rdx, (%r8)
        retq

Differential Revision: http://reviews.llvm.org/D6486

llvm-svn: 223175

llvm-svn: 221130

Remove definitions from Intrin.h that already exist in one of the other x86 intrinsic headers. Add a run line with Broadwell as the cpu type to ms-intrin.cpp test to catch some of these in the future.

llvm-svn: 221127

The Windows NT SDK uses __readfsdword and declares it as a compiler provided
builtin (#pragma intrinsic(__readfsword).  Because intrin.h is not referenced
by winnt.h, it is not possible to provide an out-of-line definition for the
intrinsic.  Provide a proper compiler builtin definition.

llvm-svn: 220859

Also provide _setjmpex(). r200243 put in _setjmp() and _setjmpex() behind a
comment since jmp_buf wasn't available. r200344 added jmp_buf and put in
_setjmp(), but missed _setjmpex().

llvm-svn: 212557

Protect MMX specific declarations under a __MMX__ guard.  This header can be
included on non-x86 architectures (e.g. ARM) which do not support the MMX ISA.
Use the preprocessor to prevent these declarations from being processed.

llvm-svn: 212512

Conditionally include x86intrin.h if we are building for x86 or x86_64.
Conditionalise definition of inline assembly routines which use x86 or x86_64
inline assembly. This is needed as clang can target Windows on ARM where these
definitions may be included into user code.

llvm-svn: 211716

Add support for _InterlockedCompareExchangePointer, _InterlockExchangePointer,
_InterlockExchange.  These are available as a compiler intrinsic on ARM and x86.
These are used directly by the Windows SDK headers without use of the intrin
header.

llvm-svn: 211216

llvm-svn: 208699

Since r207132, these are defined in ia32intrin.h.

llvm-svn: 207134

Don't include input and output regs in clobbers.  Prefix some
identifiers with __.  Add a memory constraint to __readcr3 to prevent
reordering.  This constraint is heavy handed, but conservatively
correct.

Thanks to PaX Team for the suggestions.

llvm-svn: 205778

Fixes PR19301.

Based on a patch from Steven Graf!

llvm-svn: 205751

Differential Revision: http://llvm-reviews.chandlerc.com/D3212

llvm-svn: 205172

llvm-svn: 204827

llvm-svn: 203816

llvm-svn: 203722