It was breaking buildbots.

llvm-svn: 239397

Summary:
For some branches, GAS accepts an immediate instead of the 2nd register operand.
We only implement this for BNE and BEQ for now. Other branch instructions can be added later, if needed.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D9666

llvm-svn: 239396

Differential Revision: http://reviews.llvm.org/D10320

llvm-svn: 239353

It was calling ChangeSection with the wrong current section, eventually leading
to a crash.

llvm-svn: 239335

This patch adds support for system register MMFR4_EL1 (memory model feature register) in the assembler.
This register provides information about the implemented memory model and memory management support.

llvm-svn: 239302

Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

Differential Revision: http://reviews.llvm.org/D10310

llvm-svn: 239300

[objdump] Moving PrintImmHex out of MachODump and in to llvm-objdump and setting instprinter appropriately.

llvm-svn: 239265

Teaching llvm-mc how to understand the defsym command line option.  This allows integer-constant symbols to be defined on the command line and used during assembly.

llvm-svn: 239240

[MC] Common symbols weren't being checked for redeclaration which allowed an assembly file to generate an assertion in setCommon(): !isCommon().  This change allows redeclaration as long as the size and alignment match exactly, otherwise report a fatal error.

llvm-svn: 239227

Fixes pr23771.

llvm-svn: 239214

llvm-svn: 239161

These are added mainly for the benefit of clang, but this also means that they
are now allowed in .fpu directives and we emit the correct .fpu directive when
single-precision-only is used.

Differential Revision: http://reviews.llvm.org/D10238

llvm-svn: 239151

This is breaking the Windows buildbots.

llvm-svn: 239145

Summary:
Only restoring AvailableFeatures is not enough and will lead to buggy behaviour.
For example, if we have a feature enabled and we ".set pop", the next time we try
to ".set" that feature nothing will happen because the "!(STI.getFeatureBits()[Feature])"
check will be false, because we didn't restore STI.FeatureBits.

In order to fix this, we need to make MipsAssemblerOptions remember the STI.FeatureBits
instead of the AvailableFeatures and then regenerate AvailableFeatures each time we ".set pop".
This is because, AFAIK, there is no way to convert from AvailableFeatures back to STI.FeatureBits,
but the reverse is possible by using ComputeAvailableFeatures(STI.FeatureBits).

I also moved the updating of AssemblerOptions inside the "if" statement in
setFeatureBits() and clearFeatureBits(), as there is no reason to update if
nothing changes.

Reviewers: dsanders, mkuper

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9156

llvm-svn: 239144

Fix the FIXME and remove this old as(1) compat option. It was useful for
bringup of the integrated assembler to diff object files, but now it's
just causing more relocations than strictly necessary to be generated.

rdar://21201804

llvm-svn: 239084

Section symbols exist as an optimization: instead of having multiple relocations
point to different symbols, many of them can point to a single section symbol.

When that optimization is unused, a section symbol is also unused and adds no
extra information to the object file.

This saves a bit of space on the object files and makes the output of
llvm-objdump -t easier to read and consequently some tests get quite a bit
simpler.

llvm-svn: 239045

llvm-svn: 239042

llvm-svn: 239041

llvm-svn: 239019

Added all forms of VPERMPS/PD instrcuctions.
Added encoding tests.

llvm-svn: 239016

llvm-svn: 239011

AVX-512: Implemented GETEXP instruction for KNL and SKX
Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.
CR:
http://reviews.llvm.org/D9991

llvm-svn: 238923

Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238917

The ELF spec is very clear:

-----------------------------------------------------------------------------
If the value is non-zero, it represents a string table index that gives the
symbol name. Otherwise, the symbol table entry has no name.
--------------------------------------------------------------------------

In particular, a st_name of 0 most certainly doesn't mean that the symbol has
the same name as the section.

llvm-svn: 238899

llvm-svn: 238858

AVX-512: Implemented VRANGESD and VRANGESS instructions for SKX Implemented DAG lowering for all these forms.
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238834

Patch by: Tom Coxon

Reviewers: t.p.northover

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8501

llvm-svn: 238818

Summary:
Make mips-expansions.s more readable by grouping the instructions with their respective CHECK's.
This test is going to get a lot bigger soon and it will become essentially unreadable if the current formatting is kept.

I've also made the comments more useful and accurate, and I've restricted the RUN lines to under 80 columns.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10089

llvm-svn: 238817

The second %dtprel_hi is used on an addiu so it looks like a copy/paste error.

llvm-svn: 238815

llvm-svn: 238814

Summary: These directives are used to set the current value of the SoftFloat feature.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits, mpf

Differential Revision: http://reviews.llvm.org/D9074

llvm-svn: 238813

Implemented DAG lowering for all these forms.
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238811

llvm-svn: 238810

Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.

llvm-svn: 238809

This handles only the 32 bit case.

llvm-svn: 238751

llvm-svn: 238745

Implemented DAG lowering for all these forms.
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238738

including encodings.

llvm-svn: 238729

Implemented DAG lowering for all these forms.
Added tests for encoding.

by Igor Breger (igor.breger@intel.com)

llvm-svn: 238728

This patch corresponds to review:
http://reviews.llvm.org/D9941

It adds the various FMA instructions introduced in the version 2.07 of
the ISA along with the testing for them. These are operations on single
precision scalar values in VSX registers.

llvm-svn: 238578