Commits · 81def7224ecca013eafc3c6402df18f6af791e41 · Roger Ferrer / llvm-epi · GitLab

Dec 07, 2017
- [RISCV] MC layer support for the standard RV64M instruction set extension · 81def722
  Alex Bradbury authored Dec 07, 2017
  81def722
- [RISCV] MC layer support for the standard RV64I instructions · a6e62483
  Alex Bradbury authored Dec 07, 2017
  a6e62483
- [RISCV] MC layer support for the standard RV32D instruction set extension · 7bc2a95b
  Alex Bradbury authored Dec 07, 2017
  7bc2a95b
- [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. · a8a83d15
  Francis Visoiu Mistrih authored Dec 07, 2017
  a8a83d15
- [RISCV] MC layer support for the standard RV32F instruction set extension · 0d6cf906
  Alex Bradbury authored Dec 07, 2017
  0d6cf906
- [TableGen] Give the option of tolerating duplicate register names · d590c857
  Alex Bradbury authored Dec 07, 2017
  d590c857
- [SelectionDAG] In SplitVecOp_EXTRACT_VECTOR_ELT, simplify the code that makes... · dfecd45f
  Craig Topper authored Dec 07, 2017
  dfecd45f
- [SelectionDAG] Use TLI.getVectorIdxTy to determine type for an... · 26ed8d12
  Craig Topper authored Dec 07, 2017
  26ed8d12
- Skip DBG instr in OptimizePHIs when looking for dead PHI cycles · b5deac44
  Mikael Holmen authored Dec 07, 2017
  b5deac44
- [AVR] Override ParseDirective · 8543d53f
  Leslie Zhai authored Dec 07, 2017
  8543d53f
- Revert "[WebAssembly] Import the linear memory and function table." · 8460b264
  Sam Clegg authored Dec 07, 2017
  8460b264
- [WebAssembly] section kind can be code · e1694f9b
  Sam Clegg authored Dec 07, 2017
  e1694f9b
- [MC/Dwarf] Use the older DWARF linetables format on Darwin. · 23b3f6da
  Davide Italiano authored Dec 07, 2017
  23b3f6da
- [ModRefInfo] Replace remaining bit-wise operations with wrappers. · d6037ebe
  Alina Sbirlea authored Dec 07, 2017
  d6037ebe
- [WebAssembly] Don't try to emit size information for unsized types · 5cf64739
  Dan Gohman authored Dec 07, 2017
  5cf64739
- [Coverage] Scan ahead for the most-recent completed count (PR35495) · 337b0db1
  Vedant Kumar authored Dec 07, 2017
  337b0db1
- [WebAssembly] Import the linear memory and function table. · 96d22e12
  Dan Gohman authored Dec 06, 2017
  96d22e12
Dec 06, 2017
- [AArch64] Add patterns to replace fsub fmul with fma fneg. · 5d6a4e43
  Florian Hahn authored Dec 06, 2017
  5d6a4e43
- [LV] Interleaved access vectorization: fix computing new alias info · a502ee73
  Adam Nemet authored Dec 06, 2017
  a502ee73
- [Hexagon] Recognize vdealb, vdealh, vshuffb and vshuffh specifically · d2967868
  Krzysztof Parzyszek authored Dec 06, 2017
  d2967868
- [Hexagon] Handle perfect shuffles on single vectors · 64533cf6
  Krzysztof Parzyszek authored Dec 06, 2017
  64533cf6
- [InstCombine] canonicalize constant-minus-boolean to select-of-constants · b6404a8c
  Sanjay Patel authored Dec 06, 2017
  b6404a8c
- [PGO] Make indirect call promotion a utility · e363d2ce
  Matthew Simpson authored Dec 06, 2017
  e363d2ce
- [WebAssembly] Commit a file I accidentally omitted from r319956. · 7ae3f465
  Dan Gohman authored Dec 06, 2017
  7ae3f465
- [WebAssembly] Remove WASM_STACK_POINTER. · ad19047d
  Dan Gohman authored Dec 06, 2017
  ad19047d
- [MachineCombiner] Add up latencies of all instructions in new pattern. · 001c3dd2
  Florian Hahn authored Dec 06, 2017
  001c3dd2
- [ModRefInfo] Do not use ModRefInfo result in if conditions as this makes · 18fea013
  Alina Sbirlea authored Dec 06, 2017
  18fea013
- [InlineFunction] Only replace call if there are VarArgs to forward. · 115d9916
  Florian Hahn authored Dec 06, 2017
  115d9916
- [LoopUtils] simplify createTargetReduction(); NFCI · 3e069f57
  Sanjay Patel authored Dec 06, 2017
  3e069f57
- [X86][AVX512] Tag mask reg op instruction scheduler classes · 9afbe77a
  Simon Pilgrim authored Dec 06, 2017
  9afbe77a
- [Hexagon] Suppress more warnings on unused variables defined for asserts. · b684b1aa
  Tim Shen authored Dec 06, 2017
  b684b1aa
- [ModRefInfo] Use createModRefInfo wrapper to create a ModRefInfo from FunctionModRefBehavior. · 5beb1838
  Alina Sbirlea authored Dec 06, 2017
  5beb1838
- [Hexagon] Suppress warnings on unused variables defind for asserts. · 7654ed03
  Tim Shen authored Dec 06, 2017
  7654ed03
- [COFF] Ignore semicolons in module definition identifiers · efb5024e
  Rui Ueyama authored Dec 06, 2017
  efb5024e
- [LoopUtils] fix variable name to match FMF vocabulary; NFC · 1ea7b6f7
  Sanjay Patel authored Dec 06, 2017
  1ea7b6f7
- Update obj2yaml and yaml2obj for .debug$H section. · c221dc71
  Zachary Turner authored Dec 06, 2017
  c221dc71
- [Target] dumpr() is defined only in debug builds. · 9c60c7dc
  Davide Italiano authored Dec 06, 2017
  9c60c7dc
- [X86][AVX512] Tag scalar insert/extract instruction scheduler classes · d255a620
  Simon Pilgrim authored Dec 06, 2017
  d255a620
- [X86] Simplify the TTI code for getInterleavedMemoryOpCost around for AVX512BW. NFCI · 8b0f185c
  Craig Topper authored Dec 06, 2017
  8b0f185c
- [X86][AVX2] Tag MASKMOV instruction scheduler classes · 809c024b
  Simon Pilgrim authored Dec 06, 2017
  809c024b