Commits · 85c7653d92a8c8585aded983cd3e220c40e2447c · Roger Ferrer / llvm-epi · GitLab

Oct 11, 2020
- [InstCombine] add tests with extra uses for add+xor transform; NFC · 85c7653d
  Sanjay Patel authored Oct 10, 2020
  
  85c7653d
- [InstCombine] add/adjust tests for add+xor -> shifts; NFC · c5138e61
  Sanjay Patel authored Oct 10, 2020
  
  c5138e61
- [VE][NFC] Clean VEISelLowering.cpp · 86f69689
  Kazushi (Jam) Marukawa authored Oct 11, 2020
  86f69689
- Fix Wdocumentation warning. NFCI. · c7f3bc87
  Simon Pilgrim authored Oct 11, 2020
  c7f3bc87
- [X86][SSE2] Use smarter instruction patterns for lowering UMIN/UMAX with v8i16. · 913d7a11
  Simon Pilgrim authored Oct 11, 2020
  913d7a11
- [InstCombine] Remove accidental unnecessary ConstantExpr qualification added in rGb752daa26b64155 · 7c71b449
  Simon Pilgrim authored Oct 11, 2020
  7c71b449
- [InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw · b97093e5
  Simon Pilgrim authored Oct 11, 2020
  b97093e5
- [InstCombine] Replace getLogBase2 internal helper with ConstantExpr::getExactLogBase2. NFCI. · b752daa2
  Simon Pilgrim authored Oct 11, 2020
  b752daa2
- [mlir] add scf.if op canonicalization pattern that removes unused results · 93377888
  Tobias Gysi authored Oct 11, 2020
  93377888
- [Coroutines] Refactor/Rewrite Spill and Alloca processing · 667dfe39
  Xun Li authored Oct 10, 2020
  667dfe39
- [X86] Redefine X86ISD::PEXTRB/W and X86ISD::PINSRB/PINSRW to use a i8... · 98953279
  Craig Topper authored Oct 10, 2020
  98953279
- [X86] AMX intrinsics should have ImmArg for the register numbers and use timm in isel patterns. · 7f1b2a61
  Craig Topper authored Oct 10, 2020
  
  7f1b2a61
- [X86] Add a X86ISD::BEXTRI to distinquish the case where the control must be a constant. · 37584951
  Craig Topper authored Oct 10, 2020
  37584951
- [Hexagon] Replace HexagonISD::VSPLAT with ISD::SPLAT_VECTOR · 9237e73a
  Krzysztof Parzyszek authored Oct 09, 2020
  9237e73a
- [SDAG] Remember to set UndefElts in isSplatValue for SPLAT_VECTOR · 61eaa2e1
  Krzysztof Parzyszek authored Oct 10, 2020
  
  61eaa2e1
Oct 10, 2020
- [X86] Delete redundant 'static' from namespace scope 'static constexpr'. NFC · a8682554
  Fangrui Song authored Oct 10, 2020
  a8682554
- [InstCombine] getLogBase2(undef) -> 0. · 702ccb40
  Simon Pilgrim authored Oct 10, 2020
  702ccb40
- Fix CMake configuration error when run with -Werror/-Wall · d0c8d585
  Alex Denisov authored Oct 10, 2020
  d0c8d585
- [InstCombine] getLogBase2 - no need to specify Type. NFCI. · 3aab3cbd
  Simon Pilgrim authored Oct 10, 2020
  3aab3cbd
- Remove %tmp variables from test cases to appease update_test_checks.py · f68d174c
  Simon Pilgrim authored Oct 10, 2020
  
  f68d174c
- [PowerPC] ReplaceNodeResults - bail on funnel shifts and let generic legalizers deal with it · 2c3e4a21
  Simon Pilgrim authored Oct 10, 2020
  2c3e4a21
- Define splat_vector for ISD::SPLAT_VECTOR in TargetSelectionDAG.td · 4af6c6bf
  Krzysztof Parzyszek authored Oct 09, 2020
  
  4af6c6bf
- [lldb] [Windows] Remove unused functions. NFC. · 5d330f43
  Martin Storsjö authored Oct 10, 2020
  5d330f43
- [lldb] [Windows] Add missing 'override', silencing warnings. NFC. · abaca237
  Martin Storsjö authored Oct 10, 2020
  abaca237
- [PowerPC] Add ppc32 funnel shift test coverage · f2e08c68
  Simon Pilgrim authored Oct 10, 2020
  
  f2e08c68
- [InstCombine] Add test case showing rotate intrinsic being split by SimplifyDemandedBits · 803b7123
  Simon Pilgrim authored Oct 10, 2020
  803b7123
- [lldb] [Process/FreeBSDRemote] Fix double semicolon · 8dc2faf6
  Michał Górny authored Oct 10, 2020
  
  8dc2faf6
- [lldb] [Process/FreeBSDRemote] Kill process via PT_KILL · 9a37587e
  Michał Górny authored Oct 10, 2020
  9a37587e
- [lldb] [Process/FreeBSD] Mark methods override in RegisterContext* · d83cd73e
  Michał Górny authored Oct 10, 2020
  d83cd73e
- Step down from security group · d89de5a1
  Philip Reames authored Oct 10, 2020
  d89de5a1
- [AMDGPU] Add gfx602, gfx705, gfx805 targets · 666ef0db
  Tim Renouf authored Oct 06, 2020
  666ef0db
- [SCEV] Add test cases where the max BTC is imprecise, due to step != 1. · d48b249b
  Florian Hahn authored Oct 10, 2020
  d48b249b
- [SCEV] Handle ULE in applyLoopGuards. · 2e9fd754
  Florian Hahn authored Oct 10, 2020
  2e9fd754
- [SCEV] Add a test case with ULE loop guard. · 2c6fc28a
  Florian Hahn authored Oct 10, 2020
  
  2c6fc28a
- [MemCpyOpt] Add test for incorrect memset DSE (NFC) · 329dbdaa
  Nikita Popov authored Oct 10, 2020
  329dbdaa
- [ARM] Attempt to make Tail predication / RDA more resilient to empty blocks · cb27006a
  David Green authored Oct 10, 2020
  cb27006a
- [DebugInfo] Support for DWARF attribute DW_AT_rank · 96bd4d34
  Alok Kumar Sharma authored Oct 10, 2020
  96bd4d34
- [clangd] Map bits/stdint-intn.h and bits/stdint-uintn.h to cstdint. · 0db08e59
  Benjamin Kramer authored Oct 10, 2020
  0db08e59
- [AArch64][LV] Move vectorizer test to Transforms/LoopVectorize/AArch64. NFC · 6d8eea61
  David Green authored Oct 10, 2020
  
  6d8eea61
- [TblGen][Scheduling] Fix debug output. NFC · f2741f2a
  David Green authored Oct 10, 2020
  f2741f2a