Commits · 8f3d47c54ac21f99b25d8ad00598b7f5be00d6d8 · Roger Ferrer / llvm-epi · GitLab

Jan 27, 2020
- [DWARF] Do not pass Version to DWARFExpression. NFCI. · 8f3d47c5
  Igor Kudrin authored Jan 23, 2020
  8f3d47c5
- [DWARF] Simplify DWARFExpression. NFC. · 548553ea
  Igor Kudrin authored Jan 23, 2020
  548553ea
- Improvements to call site register worklist · 13d4ef9a
  David Stenberg authored Jan 27, 2020
  13d4ef9a
- [ARM][MVE] Tail-predication: support constant trip count · b567ff2f
  Sjoerd Meijer authored Jan 27, 2020
  b567ff2f
- [ARM][LowOverheadLoops] Dont ignore VCTP · 6c2df5d1
  Sam Parker authored Jan 27, 2020
  6c2df5d1
- Don't separate imp/expl def handling for call site params · b46baa82
  David Stenberg authored Jan 27, 2020
  b46baa82
- [Alignment][NFC] Use Align with CreateAlignedLoad · 07c9d532
  Guillaume Chatelet authored Jan 27, 2020
  07c9d532
- [Alignment][NFC] Use Align with CreateMaskedScatter/Gather · d0a7cc71
  Guillaume Chatelet authored Jan 24, 2020
  d0a7cc71
- [MIPS GlobalISel] Select population count (popcount) · cbf03aee
  Petar Avramovic authored Jan 27, 2020
  cbf03aee
- [MIPS GlobalISel] Select count trailing zeros · 8bc7ba5b
  Petar Avramovic authored Jan 27, 2020
  8bc7ba5b
- [MIPS GlobalISel] Select count leading zeros · 2b66d32f
  Petar Avramovic authored Jan 27, 2020
  2b66d32f
- [MachineVerifier] Simplify and delete LLVM_VERIFY_MACHINEINSTRS from a comment. NFC · 941f20c3
  Fangrui Song authored Jan 26, 2020
  941f20c3
- [FPEnv] Divide macro INSTRUCTION into INSTRUCTION and DAG_INSTRUCTION, · 17b8f96d
  Wang, Pengfei authored Jan 17, 2020
  17b8f96d
Jan 26, 2020
- [X86][BdVer2] Polish LEA instruction scheduling info · 76fcf900
  Roman Lebedev authored Jan 26, 2020
  76fcf900
- [X86][AVX] Extend combineCommutableSHUFP to handle v8f32 and v16f32 commutable shufps patterns · fa19d67a
  Simon Pilgrim authored Jan 26, 2020
  
  fa19d67a
- [IR] masked gather/scatter alignment should be set · cc034a58
  Guillaume Chatelet authored Jan 22, 2020
  cc034a58
- [X86][SSE] combineCommutableSHUFP - permilps(shufps(load(),x)) --> permilps(shufps(x,load())) · 1a81b296
  Simon Pilgrim authored Jan 26, 2020
  1a81b296
- [TargetLowering] Respect recursive depth in SimplifyDemandedBits call to ComputeNumSignBits · 4a5f9d9f
  Simon Pilgrim authored Jan 26, 2020
  
  4a5f9d9f
- AMDGPU/GlobalISel: Clean-up code around ISel for Intrinsics. · 66f93071
  Maheaha Shivamallappa authored Jan 26, 2020
  66f93071
- [X86] Use a macro to convert X86ISD names to strings in getTargetNodeName. · 3fdd435a
  Craig Topper authored Jan 25, 2020
  3fdd435a
Jan 25, 2020
- [SelectionDAG] ComputeNumSignBits - add DemandedElts support for MIN/MAX ops · 3daa71ee
  Simon Pilgrim authored Jan 25, 2020
  
  3daa71ee
- [SelectionDAG] ComputeNumSignBits - add support for rotate non-uniform vector amounts · 3f8916b2
  Simon Pilgrim authored Jan 25, 2020
  
  3f8916b2
- [SelectionDAG] ComputeNumSignBits - add support for rotate uniform vector amounts · e3c26a9d
  Simon Pilgrim authored Jan 25, 2020
  
  e3c26a9d
- [TargetLowering] SimplifyDemandedBits - Remove ashr if all our demandedbits... · c8de7c8f
  Simon Pilgrim authored Jan 25, 2020
  c8de7c8f
- AMDGPU/SILoadStoreOptimizer: Fix uninitialized variable error · cb297050
  Tom Stellard authored Jan 24, 2020
  cb297050
- AMDGPU/SILoadStoreOptimizer: Improve merging of out of order offsets · 86c944d7
  Tom Stellard authored Jan 24, 2020
  86c944d7
- Fix header includes after 0697bcb6 · 9f69157b
  Weverything authored Jan 24, 2020
  
  9f69157b
- Revert "Reland: [DWARF] Allow cross-CU references of subprogram definitions" · 802bec89
  Vedant Kumar authored Jan 24, 2020
  802bec89
- [Support] Split MallocAllocator out of Allocator.h · 0697bcb6
  Reid Kleckner authored Jan 24, 2020
  0697bcb6
- [IR] Move CallBase::getOperandBundlesAsDefs out of line, NFC · 3da47749
  Reid Kleckner authored Jan 24, 2020
  3da47749
- [GISelKnownBits] Add support for PHIs · 5d87b5d2
  Quentin Colombet authored Jan 24, 2020
  5d87b5d2
- [codeview] Prune SimpleTypeSerializer.h headers, NFC · 632ba9fc
  Reid Kleckner authored Jan 24, 2020
  632ba9fc
- [SelectionDag] Updated FoldConstantArithmetic method signature in preparation... · daee63f9
  @justice_adams (Justice Adams) authored Jan 24, 2020
  daee63f9
Jan 24, 2020
- [X86] Break the loop in LowerReturn into 2 loops. NFCI · 2c1decc0
  Craig Topper authored Jan 24, 2020
  2c1decc0
- [X86] Make `llc --help` output readable again · 70cbf8c7
  Roman Lebedev authored Jan 25, 2020
  70cbf8c7
- [msan] Instrument x86.pclmulqdq* intrinsics. · 1df8549b
  Evgenii Stepanov authored Jan 24, 2020
  1df8549b
- [WebAssembly] Update bleeding-edge CPU features · 65eb1130
  Heejin Ahn authored Jan 23, 2020
  65eb1130
- [WebAssembly] Add reference types target feature · 764f4089
  Heejin Ahn authored Jan 23, 2020
  764f4089
- [DAGCombiner] Add combine for (not (strict_fsetcc)) to create a strict_fsetcc... · d3bf06bc
  Craig Topper authored Jan 24, 2020
  d3bf06bc
- AMDGPU/GlobalISel: Select wqm, softwqm and wwm intrinsics · 3b939455
  Matt Arsenault authored Jan 17, 2020
  
  3b939455