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  1. Sep 07, 2015
  2. Sep 06, 2015
    • Simon Pilgrim's avatar
      15fc1348
    • Simon Pilgrim's avatar
      [X86][AVX512] Added 512-bit vector shift tests. · b38c09d7
      Simon Pilgrim authored
      Only works for avx512f (dq) targets so far - need to add avx512bw tests once char/short shifts are supported.
      
      llvm-svn: 246943
      b38c09d7
    • David Majnemer's avatar
      [InstCombine] Don't divide by zero when evaluating a potential transform · 135ca40a
      David Majnemer authored
      Trivial multiplication by zero may survive the worklist.  We tried to
      reassociate the multiplication with a division instruction, causing us
      to divide by zero; bail out instead.
      
      This fixes PR24726.
      
      llvm-svn: 246939
      135ca40a
    • Hal Finkel's avatar
      [SelectionDAG] Swap commutative binops before constant-based folding · 10aac5fd
      Hal Finkel authored
      In searching for a fix for the underlying code-quality bug highlighted by
      r246937 (that SDAG simplification can lead to us generating an ISD::OR node
      with a constant zero LHS), I ran across this:
      
      We generically canonicalize commutative binary-operation nodes in SDAG getNode
      so that, if only one operand is a constant, it will be on the RHS.  However, we
      were doing this only after a bunch of constant-based simplification checks that
      all assume this canonical form (that any constant will be on the RHS). Moving
      the operand-swapping canonicalization prior to these checks seems like the
      right thing to do (and, as it turns out, causes SDAG to completely fold away the
      computation in test/CodeGen/ARM/2012-11-14-subs_carry.ll, just like InstCombine
      would do).
      
      llvm-svn: 246938
      10aac5fd
    • Hal Finkel's avatar
      [PowerPC] Don't commute trivial rlwimi instructions · ccf9259c
      Hal Finkel authored
      To commute a trivial rlwimi instructions (meaning one with a full mask and zero
      shift), we'd need to ability to form an all-zero mask (instead of an all-one
      mask) using rlwimi. We can't represent this, however, and we'll miscompile code
      if we try.
      
      The code quality problem that this highlights (that SDAG simplification can
      lead to us generating an ISD::OR node with a constant zero LHS) will be fixed
      as a follow-up.
      
      Fixes PR24719.
      
      llvm-svn: 246937
      ccf9259c
    • Craig Topper's avatar
      [TableGen] Use make_unique. NFC. · 1c8fbd24
      Craig Topper authored
      llvm-svn: 246936
      1c8fbd24
    • Andrew Wilkins's avatar
      [bindings] Update Go bindings to DIBuilder · df17a9c5
      Andrew Wilkins authored
      Summary:
      Update the Go bindings to DIBuilder to match
      the split of creating local variables into
      auto and parameter variables.
      
      Reviewers: pcc
      
      Subscribers: llvm-commits, axw
      
      Differential Revision: http://reviews.llvm.org/D11864
      
      llvm-svn: 246935
      df17a9c5
  3. Sep 05, 2015
  4. Sep 04, 2015
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