Commits · cf63e9d4caccbd540df083c63a5217ac50b5e1f9 · Roger Ferrer / llvm-epi · GitLab

Mar 14, 2022
- [WPD] Extend checking mode to support fallback to indirect call · fee0bde4
  Teresa Johnson authored Mar 10, 2022
  fee0bde4
- [OpaquePtr][AArch64] Use elementtype on ldxr/stxr · 250620f7
  Arthur Eubanks authored Feb 24, 2022
  250620f7
- [IROutliner] Avoid reusing PHINodes that have already been matched when... · 3c90812f
  Andrew Litteken authored Mar 09, 2022
  3c90812f
- [NewPM] Actually recompute GlobalsAA before module optimization pipeline · 4fc7c55f
  Arthur Eubanks authored Mar 05, 2022
  4fc7c55f
- [test] Add phase ordering test · b9cf2df3
  Arthur Eubanks authored Mar 05, 2022
  
  b9cf2df3
- [ValueTracking] Simplify llvm::isPointerOffset() · 55cf09ae
  Arthur Eubanks authored Feb 24, 2022
  55cf09ae
- [TLI] Check that malloc argument has type size_t · 04b717c4
  Nikita Popov authored Mar 14, 2022
  04b717c4
- [WebAssembly] Second phase of implemented extended const proposal · 9504ab32
  Sam Clegg authored Mar 09, 2022
  9504ab32
- [SLPVectorizer] Handle external load/store pointer uses with opaque pointers · 8361c5da
  Nikita Popov authored Mar 14, 2022
  8361c5da
- [Verifier] Verify llvm.access.group metadata · f00cd276
  Nikita Popov authored Mar 14, 2022
  f00cd276
- [PowerPC] Add missed VSX shuffles instead of Altivec ones · 766ca2c5
  Nemanja Ivanovic authored Mar 11, 2022
  766ca2c5
- [VE] v256f32|64 fma isel · 3297571e
  Simon Moll authored Mar 14, 2022
  3297571e
- [SCCP][IR] Landing pads are not safe to remove · da48f08a
  Nikita Popov authored Mar 14, 2022
  da48f08a
- [CoroSplit] Avoid self-replacement · ce6ca00a
  Nikita Popov authored Mar 14, 2022
  ce6ca00a
- [DeadArgElim] Guard against function type mismatch · 3ec44c22
  Nikita Popov authored Mar 14, 2022
  3ec44c22
- [GVN] Check load type in select PRE · cf18ec44
  Nikita Popov authored Mar 14, 2022
  cf18ec44
- [X86] Update AVX512 VBMI2 VL intrinsic tests to avoid adds · 1f09c7d1
  Simon Pilgrim authored Mar 14, 2022
  1f09c7d1
- [VE] Support more intrinsics · 92605921
  Kazushi (Jam) Marukawa authored Mar 12, 2022
  92605921
- [VE] v256i32|64 reduction isel and tests · f318d1e2
  Simon Moll authored Mar 14, 2022
  f318d1e2
- [VE] v256.32|64 gather|scatter isel and tests · a5f12623
  Simon Moll authored Mar 14, 2022
  a5f12623
- Add BasicTTIImpl cost model for llvm.get.active.lane.mask intrinsic · e7b89c2f
  David Sherwood authored Feb 28, 2022
  e7b89c2f
- [IRSim] Make sure the first instruction of a block doesn't get missed if it is... · 0c4bbd29
  Andrew Litteken authored Mar 09, 2022
  0c4bbd29
- [RISCV] Add basic code modeling for fixed length vector reduction. · ae7c6647
  Yeting Kuo authored Mar 11, 2022
  ae7c6647
- [X86] Update avx512vbmi2vl intrinsic tests to avoid adds · ec06edc6
  Luo, Yuanke authored Mar 14, 2022
  ec06edc6
- [IRSim][IROutliner] Ignoring Musttail Function · 1643f012
  Andrew Litteken authored Mar 09, 2022
  1643f012
- Revert "[IRSim][IROutliner] Ignoring Musttail Function" · 66f90fdf
  Andrew Litteken authored Mar 13, 2022
  66f90fdf
- [IRSim][IROutliner] Ignoring Musttail Function · c7037c72
  Andrew Litteken authored Mar 09, 2022
  
  c7037c72
Mar 13, 2022
- [VPlan] Ensure each iv user is only visited once in transform. · 1c0fc1f0
  Florian Hahn authored Mar 13, 2022
  1c0fc1f0
- [X86] Update AVX512 intrinsic tests to avoid adds · 3e4950d7
  Simon Pilgrim authored Mar 13, 2022
  3e4950d7
- [PhaseOrdering] Update naming of blocks after 95f76bff . · 1b634340
  Florian Hahn authored Mar 13, 2022
  
  1b634340
- [X86] Update AVX512VL intrinsic tests to avoid adds · 56021d0a
  Simon Pilgrim authored Mar 13, 2022
  56021d0a
- [LV] Create & use VPScalarIVSteps for all scalar users. · 95f76bff
  Florian Hahn authored Mar 13, 2022
  95f76bff
- [SDAG] simplify bitwise logic with repeated operand · c2592c37
  Sanjay Patel authored Mar 13, 2022
  c2592c37
- [AArch64] add tests for bitwise logic reassociation; NFC · 9f4caf55
  Sanjay Patel authored Mar 13, 2022
  9f4caf55
- [InstCombine] Add additional icmp eq/ne test coverage for Issue #32161 · 1a5a2b3d
  Simon Pilgrim authored Mar 13, 2022
  
  1a5a2b3d
- [PhaseOrdering] loop-rotation-vs-common-code-hoisting.ll - merge equivalent check-prefixes · a172876f
  Simon Pilgrim authored Mar 13, 2022
  
  a172876f
- [X86] combineCMP - peek through zero-extensions for X86cmp(zext(x0),0) zero tests (PR38960) · ad3a7654
  Simon Pilgrim authored Mar 13, 2022
  ad3a7654
- [RISCV][RVV] Fix vslide1up/down intrinsics overflow bug for SEW=64 on RV32 · 1648852c
  Lehua Ding authored Mar 13, 2022
  1648852c
- [AMDGPU] Add llvm.amdgcn.s.setprio intrinsic · 62bcfcb5
  Austin Kerbow authored Mar 03, 2022
  62bcfcb5
- [RISCV] Add DAGCombine to fold (bitreverse (bswap X)) to brev8 with Zbkb. · fd4d584d
  Craig Topper authored Mar 12, 2022
  fd4d584d