Commits · d0eeb64be5848a7832d13db9d69904db281d02e8 · Roger Ferrer / llvm-epi · GitLab

Sep 07, 2021
- [X86ISelLowering] avoid emitting libcalls to __mulodi4() · d0eeb64b
  Nick Desaulniers authored Sep 07, 2021
  d0eeb64b
- [Support] Automatically support `hash_value` when `HashBuilder` support is available. · c3c9312f
  Alexandre Rames authored Sep 07, 2021
  c3c9312f
- [NFC][support] Extract `IsHashableData` out of class · 0e627c93
  Alexandre Rames authored Sep 02, 2021
  0e627c93
- [X86] X86InstrAVX512.td - remove unused template parameters. NFC. · 9eda4721
  Simon Pilgrim authored Sep 07, 2021
  9eda4721
- [Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC) · 5648f717
  Kazu Hirata authored Sep 07, 2021
  
  5648f717
- [RISCV] Fix "set but not used" warnings · 5c6338de
  Kazu Hirata authored Sep 07, 2021
  
  5c6338de
- [InstCombine] ror/rol(X, RotAmt) == C --> X == rol/ror(C, RotAmt) (PR51567) · 3b5f318f
  Dávid Bolvanský authored Sep 07, 2021
  3b5f318f
- [IROutliner] Adding outlining for single entry/single exit multiblock regions · 81d3ac0c
  Andrew Litteken authored Jul 28, 2021
  81d3ac0c
- [PowerPC] Fixed the crash due to early if conversion with fixed CR fields · 4a226529
  Victor Huang authored Aug 30, 2021
  4a226529
- [InstCombine] add tests for smear-a-set-bit; NFC · 76183552
  Sanjay Patel authored Sep 07, 2021
  76183552
- [X86] Add missing domain to avx512_ord_cmp_sae comis sae patterns · f8d2cd14
  Simon Pilgrim authored Sep 07, 2021
  f8d2cd14
- [PowerPC] Guard XSRSP in P8 for FastISel · 042a6564
  Jinsong Ji authored Sep 07, 2021
  042a6564
- [test] precommit a test for D109354 · 61d8e271
  Jingu Kang authored Sep 07, 2021
  
  61d8e271
- Add llvm-ml to LLVM_TOOLCHAIN_TOOLS (PR50536) · c364dcbf
  Hans Wennborg authored Sep 07, 2021
  c364dcbf
- [Exegesis] Native clusterization: sub-partition by sched class id · e030f808
  Roman Lebedev authored Sep 07, 2021
  e030f808
- [NFC][exegesis] Add test for the following patch · b3b9b297
  Roman Lebedev authored Sep 07, 2021
  
  b3b9b297
- [AArch64][SVE] Improve extract_subvector for predicates. · bd576e5a
  Sander de Smalen authored Sep 07, 2021
  bd576e5a
- [MC] Use local MCSubtargetInfo in writeNops · e63455d5
  Peter Smith authored Aug 09, 2021
  e63455d5
- [MC] Add MCSubtargetInfo to MCAlignFragment · 5e71839f
  Peter Smith authored Aug 06, 2021
  5e71839f
- [amdgpu] Enable selection of `s_cselect_b64`. · 640beb38
  Michael Liao authored Aug 30, 2021
  640beb38
- [AMDGPU][GlobalISel] Legalize G_MUL for non-standard types · 6c4b634d
  Mirko Brkusanin authored Sep 07, 2021
  6c4b634d
- [AMDGPU][GlobalISel] Legalization of G_ROTL and G_ROTR · 5263bf58
  Mirko Brkusanin authored Sep 07, 2021
  5263bf58
- [X86] X86InstrSSE.td - remove unused template parameters. NFC. · 0d48ee27
  Simon Pilgrim authored Sep 07, 2021
  0d48ee27
- [X86] X86InstrVecCompiler.td - remove unused template parameters. NFC. · b50a60c2
  Simon Pilgrim authored Sep 07, 2021
  b50a60c2
- [X86] X86InstrFMA.td - remove unused template parameters. NFC. · fb387950
  Simon Pilgrim authored Sep 07, 2021
  fb387950
- [AggressiveInstCombine] Add `AssumptionCache` to aggressive instcombine · d1f9b216
  Anton Afanasyev authored Sep 05, 2021
  d1f9b216
- [AggressiveInstCombine][Test] Add test for assumptions · 388b7a15
  Anton Afanasyev authored Sep 02, 2021
  
  388b7a15
- [AggresiveInstCombine] Add wrapper calls for `KnownBits` computing · 8c0a1940
  Anton Afanasyev authored Sep 05, 2021
  8c0a1940
- [llvm-exegesis][x86] Limit llvm-exegesis analysis tests to x86_64 triple hosts · 056b409c
  Simon Pilgrim authored Sep 07, 2021
  056b409c
- [AArch64][SVE] Implement all-inactive predicate with PFALSE. · 448d47f7
  Sander de Smalen authored Sep 07, 2021
  448d47f7
- [SVE][NFC] Add SVE cost model tests for gathers/scatters · 5dcf4b4f
  David Sherwood authored Sep 01, 2021
  5dcf4b4f
- [llvm-exegesis] Analysis tests should run even without libpfm (PR51687) · 6a9e2764
  Simon Pilgrim authored Sep 07, 2021
  6a9e2764
- [NFC] Added test for stpcpy -> strcpy transformation with AS != 0 · 08144b83
  Dávid Bolvanský authored Sep 07, 2021
  
  08144b83
- [KnownBits] Add support for X*X self-multiplication · 0a07ae6e
  Simon Pilgrim authored Sep 07, 2021
  0a07ae6e
- [AMDGPU][GlobalISel] Legalize memcpy family of intrinsics · 36527cbe
  Mirko Brkusanin authored Sep 07, 2021
  36527cbe
- [RISCV][VP] Custom lower VP_STORE and VP_LOAD · a823bdf3
  Fraser Cormack authored Aug 31, 2021
  a823bdf3
- [RISCV][VP] Custom lower VP_SCATTER and VP_GATHER · f4dee8cb
  Fraser Cormack authored Aug 31, 2021
  f4dee8cb
- [exegesis][X86] ParallelSnippetGenerator: don't accidentally create serialized instructions · 03512ae9
  Roman Lebedev authored Sep 07, 2021
  03512ae9
- [AArch64] Avoid adding duplicate implicit operands when expanding pseudo insts. · da9ed3dc
  Andrew Wei authored Sep 07, 2021
  da9ed3dc
- [SelectionDAG][VP] Fix MemSDNode::getBasePtr · a40599c9
  Fraser Cormack authored Sep 06, 2021
  a40599c9