Commits · d23e4f6872c6c19c210efa9fcd19e43942ddf465 · Roger Ferrer / llvm-epi

Jan 26, 2021
- [TargetLowering][RISCV] Don't transform (seteq/ne (sext_inreg X, VT), C1) ->... · ea87cf2a
  Craig Topper authored Jan 25, 2021
  ea87cf2a
Dec 09, 2020
- [RISCV][NFC] Regenerate RISCV CodeGen tests · e28b6a60
  Michael Munday authored Dec 09, 2020
  e28b6a60
Sep 17, 2019
- [RISCV] Switch to the Machine Scheduler · 3d0fbafd
  Luis Marques authored Sep 17, 2019
  3d0fbafd
- Revert Patch from Phabricator · 2d550d19
  Luis Marques authored Sep 17, 2019
  2d550d19
- Patch from Phabricator · e38695a0
  Luis Marques authored Sep 17, 2019
  e38695a0
Feb 01, 2019
- [RISCV] Implement RV64D codegen · 7539fa2c
  Alex Bradbury authored Feb 01, 2019
  7539fa2c
Apr 25, 2018
- [RISCV] Expand function call to "call" pseudoinstruction · d58bd8dc
  Shiva Chen authored Apr 25, 2018
  d58bd8dc
Apr 12, 2018
- [RISCV] Add tests missed in r329871 · 8f296478
  Alex Bradbury authored Apr 12, 2018
  8f296478