Commits · d29f24acfb31950bc1f01a7d6f42a77969e91a67 · Roger Ferrer / llvm-epi · GitLab

Dec 07, 2017
- [AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and... · d29f24ac
  Mark Searles authored Dec 07, 2017
  d29f24ac
- [X86] Fix InsertBitToMaskVector to only issue KSHIFTS of native size so that... · dfc79c7c
  Craig Topper authored Dec 07, 2017
  dfc79c7c
- [X86] Fix typo in variable name. NFC · 7b8fa5f7
  Craig Topper authored Dec 07, 2017
  7b8fa5f7
- [X86] Make a couple helper lowering methods static. · b67e5da8
  Craig Topper authored Dec 07, 2017
  b67e5da8
- [InstCombine] add tests for abs using bit hackery; NFC · 6cfc1368
  Sanjay Patel authored Dec 07, 2017
  6cfc1368
- [X86] Replace tabs with spaces. NFCI. · 6d9ac1b1
  Simon Pilgrim authored Dec 07, 2017
  6d9ac1b1
- [X86] Tag BMI/BMI2/TBM instructions scheduler classes · 386b23f1
  Simon Pilgrim authored Dec 07, 2017
  386b23f1
- [Hexagon] Generate HVX code for basic arithmetic operations · 039d4d92
  Krzysztof Parzyszek authored Dec 07, 2017
  039d4d92
- [X86][TBM] Add TBM scheduling tests · d2e93e76
  Simon Pilgrim authored Dec 07, 2017
  d2e93e76
- [CodeGen] Fix index when printing tied machine operands · e6fc3ce4
  Francis Visoiu Mistrih authored Dec 07, 2017
  e6fc3ce4
- [X86] Rename function in recently added test case to not be 'main' returning 'void'. NFC · 5db260fc
  Craig Topper authored Dec 07, 2017
  5db260fc
- [DebugInfo] Move this test to X86/ now that it specifies a triple. · f6e180d5
  Davide Italiano authored Dec 07, 2017
  f6e180d5
- [X86] Tag SALC instructions scheduler class · 2983b469
  Simon Pilgrim authored Dec 07, 2017
  2983b469
- [X86] Add LAHF/SAHF scheduling test · ffce0d8f
  Simon Pilgrim authored Dec 07, 2017
  ffce0d8f
- [X86][VMX] Tag VMX instructions scheduler classes · a13271bc
  Simon Pilgrim authored Dec 07, 2017
  a13271bc
- [X86] Add SALC scheduling test · a383f842
  Simon Pilgrim authored Dec 07, 2017
  a383f842
- [X86] Tag LZCNT/TZCNT instructions scheduler classes · f1d599ad
  Simon Pilgrim authored Dec 07, 2017
  f1d599ad
- [DAGCombiner] eliminate shuffle of insert element · 9012391a
  Sanjay Patel authored Dec 07, 2017
  9012391a
- [InstCombine] Don't crash on out of bounds index in the insertelement · 4a4f2e8c
  Igor Laevsky authored Dec 07, 2017
  4a4f2e8c
- [X86][FMA] Regenerate fma schedule tests · ff521209
  Simon Pilgrim authored Dec 07, 2017
  ff521209
- [X86][SVM] Tag SVM instructions scheduler classes · 6b7cd86c
  Simon Pilgrim authored Dec 07, 2017
  6b7cd86c
- [CodeGen] Use more getMFIfAvailable · 567611ef
  Francis Visoiu Mistrih authored Dec 07, 2017
  567611ef
- [X86] Tag RDRAND/RDSEED instruction scheduler classes · 60411d9a
  Simon Pilgrim authored Dec 07, 2017
  60411d9a
- [X86][X87] X87 math binop pseudo instructions don't need scheduling info · bd5f7455
  Simon Pilgrim authored Dec 07, 2017
  bd5f7455
- [X86][SSE42] SSE42 string pseudo instructions don't need scheduling info · ca63dcce
  Simon Pilgrim authored Dec 07, 2017
  ca63dcce
- [X86] Regenerate RDTSC codegen tests · 9a2898ed
  Simon Pilgrim authored Dec 07, 2017
  9a2898ed
- [WebAssemby] Support main functions with alternate signatures. · cdaa87dd
  Dan Gohman authored Dec 07, 2017
  cdaa87dd
- [X86][RDSEED] Add rdseed scheduling tests · 439679c0
  Simon Pilgrim authored Dec 07, 2017
  439679c0
- [X86][RDRAND] Add rdrand scheduling tests · eb87fe62
  Simon Pilgrim authored Dec 07, 2017
  eb87fe62
- [RISCV] MC layer support for the jump/branch instructions of the RVC extension · f8f4b905
  Alex Bradbury authored Dec 07, 2017
  f8f4b905
- [RISCV] MC layer support for load/store instructions of the C (compressed) extension · 9f6aec4b
  Alex Bradbury authored Dec 07, 2017
  9f6aec4b
- [RISCV][NFC] Use TargetRegisterClass::hasSubClassEq in storeRegToStackSlot/loadReadFromStackSlot · 87a54d61
  Alex Bradbury authored Dec 07, 2017
  87a54d61
- [Nios2] final infrastructure to provide compilation of a return from a function · 1cf9c54e
  Nikolai Bozhenov authored Dec 07, 2017
  1cf9c54e
- Add proper BTVER2 sched support for MOV instr. · 44cfc514
  Andrew V. Tischenko authored Dec 07, 2017
  44cfc514
- [dsymutil] Add -verify option to run DWARF verifier after linking. · e385d009
  Jonas Devlieghere authored Dec 07, 2017
  e385d009
- [FuzzMutate] Allow only sized pointers for the GEP instruction · e8a3475b
  Igor Laevsky authored Dec 07, 2017
  e8a3475b
- [RISCV] Add missed tests for RV64D MC layer support · 72281a22
  Alex Bradbury authored Dec 07, 2017
  72281a22
- [RISCV] MC layer support for the standard RV64D instruction set extension · ee8950ef
  Alex Bradbury authored Dec 07, 2017
  ee8950ef
- [RISCV] MC layer support for the standard RV64F instruction set extension · 4dd94e0c
  Alex Bradbury authored Dec 07, 2017
  4dd94e0c
- [RISCV] MC layer support for the standard RV64A instruction set extension · 48f95a65
  Alex Bradbury authored Dec 07, 2017
  48f95a65