Commits · d29f24acfb31950bc1f01a7d6f42a77969e91a67 · Roger Ferrer / llvm-epi · GitLab

Dec 07, 2017
- [AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and... · d29f24ac
  Mark Searles authored Dec 07, 2017
  d29f24ac
- [X86] Fix InsertBitToMaskVector to only issue KSHIFTS of native size so that... · dfc79c7c
  Craig Topper authored Dec 07, 2017
  dfc79c7c
- [X86] Tag BMI/BMI2/TBM instructions scheduler classes · 386b23f1
  Simon Pilgrim authored Dec 07, 2017
  386b23f1
- [Hexagon] Generate HVX code for basic arithmetic operations · 039d4d92
  Krzysztof Parzyszek authored Dec 07, 2017
  039d4d92
- [X86][TBM] Add TBM scheduling tests · d2e93e76
  Simon Pilgrim authored Dec 07, 2017
  d2e93e76
- [X86] Rename function in recently added test case to not be 'main' returning 'void'. NFC · 5db260fc
  Craig Topper authored Dec 07, 2017
  5db260fc
- [X86] Tag SALC instructions scheduler class · 2983b469
  Simon Pilgrim authored Dec 07, 2017
  2983b469
- [X86] Add LAHF/SAHF scheduling test · ffce0d8f
  Simon Pilgrim authored Dec 07, 2017
  ffce0d8f
- [X86] Add SALC scheduling test · a383f842
  Simon Pilgrim authored Dec 07, 2017
  a383f842
- [X86] Tag LZCNT/TZCNT instructions scheduler classes · f1d599ad
  Simon Pilgrim authored Dec 07, 2017
  f1d599ad
- [DAGCombiner] eliminate shuffle of insert element · 9012391a
  Sanjay Patel authored Dec 07, 2017
  9012391a
- [X86][FMA] Regenerate fma schedule tests · ff521209
  Simon Pilgrim authored Dec 07, 2017
  ff521209
- [X86] Tag RDRAND/RDSEED instruction scheduler classes · 60411d9a
  Simon Pilgrim authored Dec 07, 2017
  60411d9a
- [X86] Regenerate RDTSC codegen tests · 9a2898ed
  Simon Pilgrim authored Dec 07, 2017
  9a2898ed
- [WebAssemby] Support main functions with alternate signatures. · cdaa87dd
  Dan Gohman authored Dec 07, 2017
  cdaa87dd
- [X86][RDSEED] Add rdseed scheduling tests · 439679c0
  Simon Pilgrim authored Dec 07, 2017
  439679c0
- [X86][RDRAND] Add rdrand scheduling tests · eb87fe62
  Simon Pilgrim authored Dec 07, 2017
  eb87fe62
- [Nios2] final infrastructure to provide compilation of a return from a function · 1cf9c54e
  Nikolai Bozhenov authored Dec 07, 2017
  1cf9c54e
- Add proper BTVER2 sched support for MOV instr. · 44cfc514
  Andrew V. Tischenko authored Dec 07, 2017
  44cfc514
- [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. · a8a83d15
  Francis Visoiu Mistrih authored Dec 07, 2017
  a8a83d15
- Skip DBG instr in OptimizePHIs when looking for dead PHI cycles · b5deac44
  Mikael Holmen authored Dec 07, 2017
  b5deac44
- [WebAssembly] Don't try to emit size information for unsized types · 5cf64739
  Dan Gohman authored Dec 07, 2017
  5cf64739
Dec 06, 2017
- [AArch64] Add patterns to replace fsub fmul with fma fneg. · 5d6a4e43
  Florian Hahn authored Dec 06, 2017
  5d6a4e43
- [Hexagon] Recognize vdealb, vdealh, vshuffb and vshuffh specifically · d2967868
  Krzysztof Parzyszek authored Dec 06, 2017
  d2967868
- [Hexagon] Handle perfect shuffles on single vectors · 64533cf6
  Krzysztof Parzyszek authored Dec 06, 2017
  64533cf6
- [WebAssembly] Remove WASM_STACK_POINTER. · ad19047d
  Dan Gohman authored Dec 06, 2017
  ad19047d
- [X86][AVX512] Tag mask reg op instruction scheduler classes · 9afbe77a
  Simon Pilgrim authored Dec 06, 2017
  9afbe77a
- [X86][SSE] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests · 7724b03c
  Simon Pilgrim authored Dec 06, 2017
  7724b03c
- [X86][AVX2] Tag MASKMOV instruction scheduler classes · 809c024b
  Simon Pilgrim authored Dec 06, 2017
  809c024b
- [X86] Regenerate test for r319778 · fa172a52
  Craig Topper authored Dec 06, 2017
  fa172a52
- [X86][AVX512] Tag aligned/unaligned move instruction scheduler classes · df052519
  Simon Pilgrim authored Dec 06, 2017
  df052519
- [X86][AVX] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests · 3ee91ade
  Simon Pilgrim authored Dec 06, 2017
  3ee91ade
- [NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns builtin in clang. · a659d259
  Artem Belevich authored Dec 06, 2017
  a659d259
- AMDGPU Tests: Change a case to be run with -O0 · ffaed720
  Zvi Rackover authored Dec 06, 2017
  ffaed720
- [Hexagon] Generate HVX code for vector construction and access · 7d37dd89
  Krzysztof Parzyszek authored Dec 06, 2017
  7d37dd89
- [X86][AVX512] Tag BROADCAST instruction scheduler classes · aa902be1
  Simon Pilgrim authored Dec 06, 2017
  aa902be1
- [ARM][AArch64][DAG] Reenable post-legalize store merge · 7d8f3e0c
  Nirav Dave authored Dec 06, 2017
  7d8f3e0c
- [X86][AVX512] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests · a9282309
  Simon Pilgrim authored Dec 06, 2017
  a9282309
- [SystemZ] Bugfix in expandRxSBG() · 19380bae
  Jonas Paulsson authored Dec 06, 2017
  19380bae
- Revert "[DAGCombine] Move AND nodes to multiple load leaves" · 0b40f211
  Vlad Tsyrklevich authored Dec 06, 2017
  0b40f211