Commits · d383df32c0d5bcdc8c160ecdd7174399aa3c5395 · Roger Ferrer / llvm-epi · GitLab

Aug 25, 2021
- [ARC] Add ADC (addition with carry) and SBC (subtraction with carry) instructions · 8c3886b0
  Thomas Johnson authored Aug 24, 2021
  8c3886b0
- [WebAssembly] Tidy up EH/SjLj options · 77b921b8
  Heejin Ahn authored Aug 06, 2021
  77b921b8
Aug 24, 2021
- [M68k][test] Migrate MC tests related to MOVEM instruciton · a65b5ddd
  Min Hsu authored Aug 24, 2021
  a65b5ddd
- [ARC] Add codegen for the readcyclecounter intrinsic along with disassembly... · ce1dc9d6
  Thomas Johnson authored Aug 24, 2021
  ce1dc9d6
- [M68k][AsmParser] Support parsing register masks & fix printing them · 47f52f98
  Ricky Taylor authored Aug 23, 2021
  47f52f98
- [AArch64][SME] Fix v8.6a bf16 NEON instruction predication · e9c8973f
  Cullen Rhodes authored Aug 24, 2021
  e9c8973f
- [ARM] Allow using ';' as asm statement separator in MSVC mode · 039b469b
  Martin Storsjö authored Aug 02, 2021
  039b469b
- [X86] AVX512FP16 instructions enabling 5/6 · c728bd5b
  Wang, Pengfei authored Aug 24, 2021
  c728bd5b
Aug 23, 2021
- [AArch64][SME] Support NEON scalar FP instructions in streaming mode · fb82b836
  Cullen Rhodes authored Aug 13, 2021
  fb82b836
- [M68k][NFC] Tidy up the just-migrated MC tests · 175139b6
  Min Hsu authored Aug 22, 2021
  175139b6
- [M68k][test] Migrate some MOVE instruction MC tests · da253d56
  Min Hsu authored Aug 22, 2021
  da253d56
Aug 22, 2021
- [X86] AVX512FP16 instructions enabling 4/6 · b088536c
  Wang, Pengfei authored Aug 22, 2021
  b088536c
Aug 19, 2021
- [AIX] Remove XFAIL from macro-same-context · a9cc6627
  Jinsong Ji authored Aug 19, 2021
  a9cc6627
Aug 18, 2021
- [X86] AVX512FP16 instructions enabling 3/6 · 2379949a
  Wang, Pengfei authored Aug 18, 2021
  2379949a
Aug 17, 2021
- [AMDGPU] Make BVH isel consistent with other MIMG opcodes · 99c790dc
  Carl Ritson authored Aug 17, 2021
  99c790dc
Aug 16, 2021
- [AArch64][SME] Disable NEON in streaming mode · 09507b53
  Cullen Rhodes authored Aug 16, 2021
  09507b53
- [X86] Support avx512fp16 compare instructions in the IntelInstPrinter. · b82ce77b
  Craig Topper authored Aug 16, 2021
  b82ce77b
Aug 15, 2021
- [X86] Prevent accidentally accepting cmpeqsh as a valid mnemonic. · ff95d252
  Craig Topper authored Aug 15, 2021
  ff95d252
- [X86] AVX512FP16 instructions enabling 2/6 · f1de9d6d
  Wang, Pengfei authored Aug 15, 2021
  f1de9d6d
Aug 13, 2021
- [MC][ELF] Mark Solaris objects as ELFOSABI_SOLARIS · 8738c5b0
  Rainer Orth authored Aug 13, 2021
  8738c5b0
Aug 11, 2021
- [AArch64][SME] Support ptrue(s) in streaming mode · 1fe0e6a3
  Cullen Rhodes authored Aug 11, 2021
  1fe0e6a3
Aug 10, 2021
- [ARC] Add codegen for count trailing zeros intrinsic for the ARC backend · b8210868
  Thomas Johnson authored Aug 07, 2021
  b8210868
- [X86] AVX512FP16 instructions enabling 1/6 · 6f7f5b54
  Wang, Pengfei authored Aug 10, 2021
  6f7f5b54
Aug 09, 2021
- [M68k] Use separate asm operand class for different widths of address · 7cbcde4a
  Min Hsu authored Aug 09, 2021
  7cbcde4a
- [MC][ELF] Do not error on parsing .debug_* section directive for MIPS · 990e8025
  Simon Atanasyan authored Aug 08, 2021
  990e8025
Aug 08, 2021
- [M68k] Update disassembler test case following up ADD / ADDA changes · 2167e237
  Min Hsu authored Aug 08, 2021
  2167e237
- [M68k] Separate ADDA from ADD and migrate rest of the arithmetic MC tests · 657bb726
  Min Hsu authored Aug 07, 2021
  657bb726
Aug 04, 2021
- [llvm][MC] Disable cfi-version test for Windows on Arm · 6f8c4340
  David Spickett authored Aug 04, 2021
  6f8c4340
Aug 03, 2021
- [AArch64][SME] Fix out of date comment · 86e4d005
  Cullen Rhodes authored Aug 03, 2021
  86e4d005
Jul 30, 2021
- [AArch64][SME] Introduce feature for streaming mode · 3a349d22
  Cullen Rhodes authored Jul 30, 2021
  3a349d22
- [ARC] Add norm/normh instructions with disassembly tests · e622c99f
  Mark Schimmel authored Jul 29, 2021
  e622c99f
- [ARC] Add additional mov immediate instruction formats with a fix for u6 decoding · cc238a6e
  Thomas Johnson authored Jul 29, 2021
  cc238a6e
Jul 27, 2021
- [AArch64][SME] Add zero instruction · 2e27c4e1
  Cullen Rhodes authored Jul 27, 2021
  2e27c4e1
Jul 26, 2021
- [PowerPC]Add addex instruction definition and MC tests · 64a15817
  Lei Huang authored Jul 23, 2021
  64a15817
- [amdgpu] Add 64-bit PC support when expanding unconditional branches. · b0402a35
  Michael Liao authored Jul 18, 2021
  b0402a35
- [SystemZ] Add support for new cpu architecture - arch14 · 8cd8120a
  Ulrich Weigand authored Jul 20, 2021
  8cd8120a
- [AArch64][AsmParser] NFC: Parser.getTok().getLoc() -> getLoc() · e6ff9179
  Cullen Rhodes authored Jul 26, 2021
  e6ff9179
Jul 23, 2021
- [ARC] Add tablegen definition for the Find Leading Set (FLS) instruction · 51d8e67e
  Thomas Johnson authored Jul 22, 2021
  51d8e67e
Jul 22, 2021
- [ARC] Add disassembly for the conditioned RSUB immediate instruction · 1cda1e61
  Thomas Johnson authored Jul 22, 2021
  1cda1e61
- [AArch64][SME] Improve diagnostic for vector select register · 00e87e1c
  Cullen Rhodes authored Jul 22, 2021
  00e87e1c