- Jul 18, 2016
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Nemanja Ivanovic authored
This patch corresponds to review: https://reviews.llvm.org/D21354 We use direct moves for extracting integer elements from vectors. We also use direct moves when converting integers to FP. When these operations are chained, we get a direct move out of a VSR followed by a direct move back into a VSR. These are redundant - all we need to do is line up the element and convert. llvm-svn: 275796
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Nirav Dave authored
Add parseToken and compatriot functions to stitch error checks in straight linear code. As part of this fix some erronous handling of directives where the EndOfStatement token either was not checked or Lexed on termination. Reviewers: rnk, majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D22312 llvm-svn: 275795
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Krzysztof Parzyszek authored
Patch by Sirish Pande. llvm-svn: 275794
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Krzysztof Parzyszek authored
The machine scheduler needs to account for available resources more accurately in order to avoid scheduling an instruction that forces a new packet to be created. This occurs in two ways: First, an instruction without an available resource may have a large priority due to other metrics and be scheduled when there are other instructions with available resources. Second, an instruction with a non-zero latency may become available prematurely. In both these cases, we attempt change the priority in order to allow a better instruction to be scheduled. Patch by Brendon Cahoon. llvm-svn: 275793
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Adhemerval Zanella authored
This patch adds 48-bits VMA support for asan on aarch64. The current 47-bit mask is not suffice since on aarch64 kernel with 48-bit vma (default on ubuntu 16.04) the process may use full VMA range as: [...] ffffa39a7000-ffffa39a8000 r--p 00000000 00:00 0 [vvar] ffffa39a8000-ffffa39a9000 r-xp 00000000 00:00 0 [vdso] ffffa39a9000-ffffa39aa000 r--p 0001c000 08:02 13631554 /lib/aarch64-linux-gnu/ld-2.23.so ffffa39aa000-ffffa39ac000 rw-p 0001d000 08:02 13631554 /lib/aarch64-linux-gnu/ld-2.23.so ffffc2227000-ffffc2248000 rw-p 00000000 00:00 0 [stack] llvm-svn: 275792
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Pavel Labath authored
This reverts r275782. The problem with the commit is that it reports an additional "exit (1)" error for every file containing a failing test, which is far more than I had intended to do. I'll need to come up with a more fine-grained way of achieving the result. llvm-svn: 275791
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Krzysztof Parzyszek authored
An instruction may have multiple predecessors that are candidates for using .cur. However, only one of them can use .cur in the packet. When this case occurs, we need to make sure that only one of the dependences gets a 0 latency value. Patch by Brendon Cahoon. llvm-svn: 275790
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Alexander Kornienko authored
llvm-svn: 275789
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Simon Pilgrim authored
llvm-svn: 275788
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Marshall Clow authored
Change a couple ifdefs from '#if __cplusplus >= 2011xxx' to '#ifndef _LIBCPP_CXX03_LANG'. No functionality change. llvm-svn: 275787
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Simon Dardis authored
When SelectionDAGISel transforms a node representing an inline asm block, memory constraint information is not preserved. This can cause constraints to be broken when a memory offset is of the form: offset + frame index when the frame is resolved. By propagating the constraints all the way to the backend, targets can enforce memory operands of inline assembly to conform to their constraints. For MIPSR6, some instructions had their offsets reduced to 9 bits from 16 bits such as ll/sc. This becomes problematic when using inline assembly to perform atomic operations, as an offset can generated that is too big to encode in the instruction. Reviewers: dsanders, vkalintris Differential Review: https://reviews.llvm.org/D21615 llvm-svn: 275786
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Nitesh Jain authored
Reviewers: jaydeep Subscribers: bhushan, mohit.bhakkad, slthakur, llvm-commits llvm-svn: 275785
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Tobias Grosser authored
llvm-svn: 275784
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Tobias Grosser authored
Create LLVM-IR for all host-side control flow of a given GPU AST. We implement this by introducing a new GPUNodeBuilder class derived from IslNodeBuilder. The IslNodeBuilder will take care of generating all general-purpose ast nodes, but we provide our own createUser implementation to handle the different GPU specific user statements. For now, we just skip any user statement and only generate a host-code sceleton, but in subsequent commits we will add handling of normal ScopStmt's performing computations, kernel calls, as well as host-device data transfers. We will also introduce run-time check generation and LICM in subsequent commits. llvm-svn: 275783
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Pavel Labath authored
Summary: We've run into this problem when the test errored out so early (because it could not connect to the remote device), that the code in D20193 did not catch the error. This resulted in the test suite reporting success with 0 tests being run. This patch makes sure that any non-zero exit code from the inferior process gets reported as an error. Basically I expand the concept of "exceptional exits", which was previously being used for signals to cover these cases as well. Reviewers: tfiala, zturner Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D22404 llvm-svn: 275782
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Haojian Wu authored
after inserting a missing header. Summary: A small improvement: Don't print newline character at the end of message, so that users don't have to type ENTER manually after running the python script. Reviewers: bkramer Subscribers: djasper, klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D22351 llvm-svn: 275781
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Mohit K. Bhakkad authored
Reviewers: dsanders Subscribers: slthakur, jaydeep, llvm-commits, Sanitizers Differential Revision: https://reviews.llvm.org/D22453 llvm-svn: 275780
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Nicolai Haehnle authored
Summary: The work item intrinsics are not available for the shader calling conventions. And even if we did hook them up most shader stages haves some extra restrictions on the amount of available LDS. Reviewers: tstellarAMD, arsenm Subscribers: nhaehnle, arsenm, llvm-commits, kzhuravl Differential Revision: https://reviews.llvm.org/D20728 llvm-svn: 275779
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Howard Hellyer authored
Summary: This patch fills in the implementation of GetMemoryRegions() on the Windows live process and minidump implementations of lldb_private::Process (ProcessWindowsLive::GetMemoryRegionInfo and ProcessWinMiniDump::Impl::GetMemoryRegionInfo.) The GetMemoryRegions API was added under: http://reviews.llvm.org/D20565 The existing Windows implementations didn’t fill in the start and end addresses within MemoryRegionInfo. This patch fixes that and adds support for the new mapped flag on MemoryRegionInfo that says whether a memory range is mapped into the process address space or not. The behaviour of both live and core implementations should match the behaviour documented on Process::GetMemoryRegionInfo (in Process.h) which in turn should match the behaviour of the qMemoryRegionInfo query documented in lldb-gdb-remote.txt. Reviewers: clayborg, amccarth Subscribers: amccarth, lldb-commits Differential Revision: https://reviews.llvm.org/D22352 llvm-svn: 275778
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Diana Picus authored
llvm-svn: 275777
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Diana Picus authored
The current logic for handling inline asm operands in DAGToDAGISel interprets the operands by looking for constants, which should represent the flags describing the kind of operand we're dealing with (immediate, memory, register def etc). The operands representing actual data are skipped only if they are non-const, with the exception of immediate operands which are skipped explicitly when a flag describing an immediate is found. The oversight is that memory operands may be const too (e.g. for device drivers reading a fixed address), so we should explicitly skip the operand following a flag describing a memory operand. If we don't, we risk interpreting that constant as a flag, which is definitely not intended. Fixes PR26038 Differential Revision: https://reviews.llvm.org/D22103 llvm-svn: 275776
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Craig Topper authored
llvm-svn: 275775
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Craig Topper authored
llvm-svn: 275774
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Diana Picus authored
At higher optimization levels, we generate the libcall for DIVREM_Ix, which is fine: aeabi_{u|i}divmod. At -O0 we generate the one for REM_Ix, which is the default {u}mod{q|h|s|d}i3. This commit makes sure that we don't generate REM_Ix calls for ABIs that don't support them (i.e. where we need to use DIVREM_Ix instead). This is achieved by bailing out of FastISel, which can't handle non-double multi-reg returns, and letting the legalization infrastructure expand the REM_Ix calls. It also updates the divmod-eabi.ll test to run under -O0 as well, and adds some Windows checks to it to make sure we don't break things for it. Fixes PR27068 Differential Revision: https://reviews.llvm.org/D21926 llvm-svn: 275773
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Eric Fiselier authored
Constructing a std::locale object from an empty string selects the language from the current environment variables. If the environment variables name a locale that doesn't exist, or isn't installed, then the construction of facets using that locale may throw. This patch removes tests that use 'std::locale l("")'. The optimal solution would be to manually set the environment variables in the test. Unfortunately there is no portable way to do this. llvm-svn: 275772
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Craig Topper authored
llvm-svn: 275771
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Craig Topper authored
llvm-svn: 275770
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Craig Topper authored
llvm-svn: 275769
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Craig Topper authored
llvm-svn: 275768
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Craig Topper authored
llvm-svn: 275767
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Craig Topper authored
[X86] Add more AVX512 instructions to X86InstrInfo::isHighLatencyDef. Also add all packed fp division instructions. llvm-svn: 275766
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Craig Topper authored
[X86] Add AVX512 load opcodes and a couple AVX load opcodes to X86InstrInfo::areLoadsFromSameBasePtr. llvm-svn: 275765
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Craig Topper authored
llvm-svn: 275764
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Craig Topper authored
Ideally we would use VEX encoded moves instead of EVEX if the high 16 registers aren't referenced, but this a good first step. llvm-svn: 275763
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Craig Topper authored
llvm-svn: 275762
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David Majnemer authored
While debugging GVNHoist, I found it confusing that the entries in a VNtoInsns were not always value numbers. They _usually_ were except for StoreInst in which case they were a hash of two different value numbers. This leads to two observations: - It is more difficult to debug things when the semantic contents of VNtoInsns changes over time. - Using a single value number is not much cheaper, the value of VNtoInsns is a SmallVector. - It is not immediately clear what the algorithm would do if there were hash collisions in the StoreInst case. Using a DenseMap of std::pair sidesteps all of this. N.B. The changes in the test were due their sensitivity to the iteration order of VNtoInsns which has changed. llvm-svn: 275761
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Jonas Hahnfeld authored
man page for mkdir says: "If the parent directory has the set-group-ID bit set, then so will the newly created directory." Differential Revision: https://reviews.llvm.org/D22265 llvm-svn: 275760
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Eric Fiselier authored
This patch updates the way libc++ handles checking for libatomic, in part to prepare for https://reviews.llvm.org/D22073. Changes: * 'LIBCXX_HAS_ATOMIC_LIB' is now set whenever libatomic is available even libc++ doesn't need to manually link it. * 'LIBCXX_HAVE_CXX_ATOMICS_WITH_LIB' is now used to detect when libatomic needs to be manually linked. * 'LIBCXX_HAS_ATOMIC_LIB' now adds 'libatomic' as a available feature in the test suite. llvm-svn: 275759
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Vedant Kumar authored
Don't make the test/tools/llvm-cov/demangle.test depend on the order in which symbols are seen, or on the exact formatting llvm-cov emits after a symbol is printed. This is an attempt to fix a Windows bot failure: http://lab.llvm.org:8011/builders/clang-x86-win2008-selfhost/builds/9141 I don't know what the root cause of the failure is, or why the showTemplateInstantiations test doesn't fail in the same way on the Windows bots. However, this measure can't hurt, and it'll at least get me on the blamelists again. llvm-svn: 275758
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Eric Fiselier authored
llvm-svn: 275757
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