Commits · d63016a86548e8231002a760bbe9eb817cd1eb00 · Roger Ferrer / llvm-epi · GitLab

Dec 25, 2021
- [CMake] Revert -Wl,-O3 · d63016a8
  Fangrui Song authored Dec 24, 2021
  d63016a8
Dec 24, 2021
- [DFAJumpThreading] Determinator BB should precede switch-defining BB · d5dc3964
  Alexey Zhikhartsev authored Dec 15, 2021
  d5dc3964
- [AMDGPU] Changing S_AND_B32 to V_AND_B32_e64 in the divergent 'trunc' to i1 pattern · 8020458c
  alex-t authored Dec 24, 2021
  8020458c
- InstCombine: Gracefully handle more allocas in the wrong address space · 28623796
  Matt Arsenault authored Dec 16, 2021
  28623796
- [X86] Enable v32i16 ISD::ROTL/ROTR lowering on AVX512BW targets · 159da567
  Simon Pilgrim authored Dec 23, 2021
  
  159da567
- [Clang][OpenMP] Add the support for atomic compare in parser · c7a589a2
  Shilei Tian authored Dec 24, 2021
  c7a589a2
- [AArch64] Add a tablegen pattern for RADDHN/RADDHN2. · bb84dd81
  Alexandros Lamprineas authored Dec 24, 2021
  bb84dd81
- [gn build] Port 969a51ff · 3b4c040c
  LLVM GN Syncbot authored Dec 24, 2021
  
  3b4c040c
- [DSE] Fix typo in recent commit · eb91d91b
  Nikita Popov authored Dec 24, 2021
  eb91d91b
- [DSE] Remove unnecessary check in getLocForWrite() (NFC) · 90095a0b
  Nikita Popov authored Dec 24, 2021
  90095a0b
- [DSE] Rename getLocForWriteEx() to getLocForWrite() (NFC) · 72d22017
  Nikita Popov authored Dec 24, 2021
  72d22017
- Reland "[X86][MS-InlineAsm] Use exact conditions to recognize MS global variables" · 24c68ea1
  Phoebe Wang authored Dec 24, 2021
  24c68ea1
- [DSE] Assert analyzable write in isRemovable() (NFC) · 034e66e7
  Nikita Popov authored Dec 24, 2021
  034e66e7
- [DSE] Avoid calling isRemovable() on non-analyzable location (NFC) · 2b8a7038
  Nikita Popov authored Dec 24, 2021
  2b8a7038
- [DSE] Call isRemovable() after getLocForWriteEx() (NFCI) · 81d69e1b
  Nikita Popov authored Dec 24, 2021
  81d69e1b
- [GlobalISel] Fix -Wunused-function in -DLLVM_ENABLE_ASSERTIONS=off builds after D114198 · ea2d4c58
  Fangrui Song authored Dec 24, 2021
  
  ea2d4c58
- [DSE] Simplify isGuaranteedLoopInvariant() (NFC) · ba2b34b1
  Nikita Popov authored Dec 24, 2021
  ba2b34b1
- [DSE][MemLoc] Handle intrinsics more generically · ae64c5a0
  Nikita Popov authored Dec 23, 2021
  ae64c5a0
- [DebugInfo] Remove type-units-maybe-unused-types.ll test · cb31a571
  Nikita Popov authored Dec 24, 2021
  cb31a571
- [Attributor] Directly call areTypesABICompatible() hook · 69ffc3ce
  Nikita Popov authored Dec 20, 2021
  69ffc3ce
- [RISCV] Use DAG variable directly instead of DCI.DAG · 02478a26
  Jim Lin authored Dec 24, 2021
  02478a26
- Revert "[DWARF] Fix PR51087 Extraneous enum record in DWARF with type units" · b05df028
  David Blaikie authored Dec 23, 2021
  b05df028
- [NFC] Remove tailing whitespaces in llvm/include/llvm/Frontend/OpenMP/OMP.td · a79c567f
  Shilei Tian authored Dec 23, 2021
  
  a79c567f
- [RISCV] Don't allow vector types to be used with inline asm 'r' constraint · 0a35211b
  Craig Topper authored Dec 23, 2021
  0a35211b
- [gn build] "port" 71b3bfde · a6114ff0
  Nico Weber authored Dec 23, 2021
  
  a6114ff0
- [gn build] (manually) port 7cd7b4d2 (sanitizer_symbolize_set_demangle) · ee4bbb50
  Nico Weber authored Dec 23, 2021
  
  ee4bbb50
Dec 23, 2021
- Revert "[DwarfDebug] Support emitting function-local declaration for a lexical... · 81378f7e
  Kristina Bessonova authored Dec 23, 2021
  81378f7e
- [Verifier] Iteratively traverse all indirect users. · 5d68dc18
  Florian Hahn authored Dec 23, 2021
  5d68dc18
- [gn build] (manually) port f103ee2e (sanitizer_symbolize_set_inline_frames) · 5fd328c4
  Nico Weber authored Dec 23, 2021
  
  5fd328c4
- [RISCV][VP] Lower mask vector VP AND/OR/XOR to RVV instructions · 10b3675a
  Victor Perez authored Dec 23, 2021
  10b3675a
- [AMDGPU] Don't remove VGPR to AGPR dead spills from frame info · d45a2479
  Brendon Cahoon authored Dec 18, 2021
  d45a2479
- [Hexagon] Introduce Hexagon v69 ISA · f766bc09
  Krzysztof Parzyszek authored Dec 22, 2021
  
  f766bc09
- [RISCV] Use positive 0.0 for the neutral element in fadd reductions if nsz is present. · 7704c503
  Craig Topper authored Dec 23, 2021
  7704c503
- [RISCV] Support strict FP conversion operations. · b7b260e1
  Craig Topper authored Dec 23, 2021
  b7b260e1
- [AArch64] Add a tablegen pattern for SQXTN2. · e70ef6d9
  Alexandros Lamprineas authored Dec 23, 2021
  e70ef6d9
- AMDGPU/GlobalISel: Fix attempt to select non-legal instr in mir test · fd3cde60
  Petar Avramovic authored Dec 23, 2021
  fd3cde60
- [X86][SSE] Add ISD::ROTR support · 71fc4bbd
  Simon Pilgrim authored Dec 23, 2021
  71fc4bbd
- [InstSimplify] Fold logic AND to zero · 0ff20f2f
  Mehrnoosh Heidarpour authored Dec 14, 2021
  0ff20f2f
- [RISCV] Disable interleaving scalar loops in the loop vectorizer. · a9486a40
  Craig Topper authored Dec 23, 2021
  a9486a40
- [X86] isVectorShiftByScalarCheap - vXi8... · a3f50fb0
  Simon Pilgrim authored Dec 23, 2021
  a3f50fb0