Commits · d67c90a8c4a686de85c69801843a1074ef8c63ec · Roger Ferrer / llvm-epi · GitLab

Aug 05, 2019
- Try to fix failing AMDGPU disasm test, both Lin/Win agree this is 0 not 0x0 · d67c90a8
  Reid Kleckner authored Aug 05, 2019
  d67c90a8
- Changing representation of .cv_def_range directives in Codeview debug info... · da60fc81
  Nilanjana Basu authored Aug 05, 2019
  da60fc81
- Revert "Changing representation of .cv_def_range directives in Codeview debug... · b5e4d7de
  Nilanjana Basu authored Aug 05, 2019
  b5e4d7de
- Changing representation of .cv_def_range directives in Codeview debug info... · a885afa9
  Nilanjana Basu authored Aug 05, 2019
  a885afa9
Aug 02, 2019
- Temporarily Revert "Changing representation of cv_def_range directives in... · 5fb56b19
  Eric Christopher authored Aug 02, 2019
  5fb56b19
- Changing representation of cv_def_range directives in Codeview debug info... · 1c675215
  Nilanjana Basu authored Aug 02, 2019
  1c675215
Aug 01, 2019
- [WebAssembly] Assembler/InstPrinter: support call_indirect type index. · 87af0b19
  Wouter van Oortmerssen authored Aug 01, 2019
  87af0b19
- [mips] Fix lowering load/store instruction in PIC case · 0620cf11
  Simon Atanasyan authored Aug 01, 2019
  0620cf11
- [RISCV] Add Custom Parser for Atomic Memory Operands · f596f450
  Sam Elliott authored Aug 01, 2019
  f596f450
Jul 31, 2019
- [ARM] Reject CSEL instructions with invalid operands · 806231ec
  Mikhail Maltsev authored Jul 31, 2019
  806231ec
- [AArch64] Add support for Transactional Memory Extension (TME) · a36d3147
  Momchil Velikov authored Jul 31, 2019
  a36d3147
Jul 30, 2019
- [RISCV] Attempt to make rv{32,64}i-aliases-invalid.s less flaky · 1d8b3788
  Sam Elliott authored Jul 30, 2019
  1d8b3788
Jul 29, 2019
- Mark test/MC/RISCV/rv{32,64}i-aliases-invalid.s unsupported also on Windows · ecd137c7
  Hans Wennborg authored Jul 29, 2019
  ecd137c7
Jul 27, 2019
- [mips] Add (dis)assembler tests for beqzl and bnezl instructions. NFC · 6faac434
  Simon Atanasyan authored Jul 27, 2019
  6faac434
Jul 26, 2019
- [AArch64][SVE2] Rename bitperm feature to sve2-bitperm · 2cde8b5d
  Cullen Rhodes authored Jul 26, 2019
  2cde8b5d
- [AArch64] Define ETE and TRBE system registers · 898d9536
  Momchil Velikov authored Jul 26, 2019
  898d9536
Jul 25, 2019
- [AArch64][SVE] Allow explicit size specifier for predicate operand · a655f476
  Momchil Velikov authored Jul 25, 2019
  a655f476
- [ARM][AArch64] Support for Cortex-A65 & A65AE, Neoverse E1 & N1 · 27595453
  Pablo Barrio authored Jul 25, 2019
  27595453
Jul 24, 2019
- [AMDGPU][MC][GFX10] Enabled GFX10 assembly with arbitrary wavesize assumed by the code · 5e1dd02c
  Dmitry Preobrazhensky authored Jul 24, 2019
  5e1dd02c
- [AMDGPU] Add all vgpr classes to asm parser · 5cdacea2
  Stanislav Mekhanoshin authored Jul 24, 2019
  5cdacea2
Jul 23, 2019
- [RISCV][NFC] Correct RUN in rvi-pseudos-invalid.s · 404551ac
  Sam Elliott authored Jul 23, 2019
  404551ac
- Revert [RISCV] Re-enable rv32i-aliases-invalid.s test · 46ffaeb0
  Sam Elliott authored Jul 23, 2019
  46ffaeb0
- [RISCV] Re-enable rv32i-aliases-invalid.s test · 53f9fec8
  Sam Elliott authored Jul 23, 2019
  53f9fec8
Jul 22, 2019
- Revert "Reland [ELF] Loose a condition for relocation with a symbol" · 5874a28a
  Vlad Tsyrklevich authored Jul 22, 2019
  5874a28a
- Reland [ELF] Loose a condition for relocation with a symbol · 0166cff0
  Nikola Prica authored Jul 22, 2019
  0166cff0
Jul 19, 2019
- [RISCV] Disable tests failing on buildbots. · 2272be94
  Matt Morehouse authored Jul 19, 2019
  2272be94
- [AMDGPU][MC] Corrected parsing of branch offsets · 4ccb7f8c
  Dmitry Preobrazhensky authored Jul 19, 2019
  4ccb7f8c
- [ARM] Add <saturate> operand to SQRSHRL and UQRSHLL · 0b001f94
  Mikhail Maltsev authored Jul 19, 2019
  0b001f94
- [DebugInfo] Some fields do not need relocations even relax is enabled. · c5ecdd3c
  Hsiangkai Wang authored Jul 19, 2019
  c5ecdd3c
Jul 18, 2019
- MC: AArch64: Add support for prel_g* relocation specifiers. · aa6a7df6
  Peter Collingbourne authored Jul 18, 2019
  aa6a7df6
- AArch64: Unify relocation restrictions between MOVK/MOVN/MOVZ. · 76427f84
  Peter Collingbourne authored Jul 18, 2019
  76427f84
- Revert "[DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame." · 657277e0
  Hsiangkai Wang authored Jul 18, 2019
  657277e0
- [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame. · e43ce1a9
  Hsiangkai Wang authored Jul 18, 2019
  e43ce1a9
Jul 17, 2019
- Revert [AArch64] Add support for Transactional Memory Extension (TME) · 0e2b74a2
  Momchil Velikov authored Jul 17, 2019
  0e2b74a2
- [RISCV][NFC] Add tests that capture current encodings for DWARF EH · aa55124e
  Alex Bradbury authored Jul 17, 2019
  aa55124e
- [AArch64] Add support for Transactional Memory Extension (TME) · 4b8da3a5
  Momchil Velikov authored Jul 17, 2019
  4b8da3a5
- [mips] Implement .cplocal directive · a884afb6
  Simon Atanasyan authored Jul 17, 2019
  a884afb6
Jul 16, 2019
- [RISCV] Match GNU tools canonical JALR and add aliases · 1ffceaa5
  Alex Bradbury authored Jul 16, 2019
  1ffceaa5
- [RISCV] Avoid overflow when determining number of nops for code align · bb479ca3
  Alex Bradbury authored Jul 16, 2019
  bb479ca3
- [WebAssembly] Rename except_ref type to exnref · 9f96a58c
  Heejin Ahn authored Jul 15, 2019
  9f96a58c