Commits · d7105e76319c992fcbcf4e5e174c06534b061fb7 · Roger Ferrer / llvm-epi · GitLab

Feb 24, 2022
- Teach the AArch64 backend to instruction select the BCAX instruction. · d7105e76
  Owen Anderson authored Feb 18, 2022
  d7105e76
Feb 23, 2022
- [NVPTX] Add ex2.approx.f16/f16x2 support · 69a8350c
  Nicolas Miller authored Feb 22, 2022
  69a8350c
- [NVPTX] Add more FMA intriniscs/builtins · be672934
  Jakub Chlanda authored Feb 22, 2022
  be672934
- [NVPTX] Expose float tys min, max, abs, neg as builtins · e0dc4ac2
  Jakub Chlanda authored Feb 22, 2022
  e0dc4ac2
- [DAGCombiner][TargetLowering] Pass SDValue by value to isMulAddWithConstProfitable. · c7d6448d
  Craig Topper authored Feb 23, 2022
  c7d6448d
- [X86] combineX86ShufflesRecursively - pull out repeated getValueType/getSimpleValueType calls. · 427d9f60
  Simon Pilgrim authored Feb 23, 2022
  
  427d9f60
- Revert "[MachineOutliner][AArch64] NFC: Split MBBs into "outlinable ranges"" · 68c718c8
  Jessica Paquette authored Feb 23, 2022
  68c718c8
- [X86] combineX86ShufflesRecursively - don't both widening inputs before... · 87753ceb
  Simon Pilgrim authored Feb 23, 2022
  87753ceb
- [X86] combineX86ShuffleChainWithExtract - don't both widening inputs after... · 22d04531
  Simon Pilgrim authored Feb 23, 2022
  22d04531
- [PowerPC] Add the Power10 LXVKQ instrution. · eb1c5a98
  Stefan Pintilie authored Feb 22, 2022
  eb1c5a98
- AArch64: clamp UBFX high-bit to 32-bits · 5658d869
  Tim Northover authored Feb 23, 2022
  5658d869
- [RISCV] Avoid infinite loop between DAGCombiner::visitMUL and... · c5bcfb98
  Alex Bradbury authored Feb 23, 2022
  c5bcfb98
- [VE][NFC] Move functions to VVP module · 606320ed
  Simon Moll authored Feb 23, 2022
  606320ed
- [NFC] Remove unnecessary "#include"s from header files · a5bbc6ef
  Bill Wendling authored Feb 23, 2022
  
  a5bbc6ef
- [ARM] Recognize SSAT and USAT from SMIN/SMAX · a10789d6
  David Green authored Feb 23, 2022
  a10789d6
- Revert "Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares."" · b661470b
  Amara Emerson authored Feb 22, 2022
  b661470b
- [WebAssembly] Fixed AsmPrinter not emitting .functype for intrinsics · 2368f18e
  Wouter van Oortmerssen authored Feb 22, 2022
  2368f18e
- [AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors · 774b5715
  David Green authored Feb 22, 2022
  774b5715
Feb 22, 2022
- [SystemZ/z/OS] Add va intrinsics for XPLINK · 30053c14
  Kai Nacke authored Feb 22, 2022
  30053c14
- Revert "[AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors" · ecb27004
  Reid Kleckner authored Feb 22, 2022
  ecb27004
- [AMDGPU] Extend SILoadStoreOptimizer to handle global saddr loads · 9e055c0f
  Stanislav Mekhanoshin authored Feb 21, 2022
  9e055c0f
- [AMDGPU] Extend SILoadStoreOptimizer to handle global loads · ba17bd26
  Stanislav Mekhanoshin authored Feb 21, 2022
  ba17bd26
- [PowerPC] Allow absolute expressions in relocations · 2aaba44b
  Nemanja Ivanovic authored Feb 22, 2022
  2aaba44b
- [AArch64][SME] Remove term 'streaming-sve' from assembler diagnostics. · ffa4dfc8
  Sander de Smalen authored Feb 22, 2022
  ffa4dfc8
- Add DriverKit support · 3a1cb362
  Egor Zhdan authored Jan 24, 2022
  3a1cb362
- [VE] Split unsupported v512.32 ops · 4fd77129
  Simon Moll authored Feb 22, 2022
  4fd77129
- [SVE] Add isel patterns for SABA/UABA. · 25ed2ab3
  Paul Walker authored Feb 14, 2022
  25ed2ab3
- [x86] add load folding restriction to pushAddIntoCmovOfConsts() · ad7214f2
  Sanjay Patel authored Feb 22, 2022
  ad7214f2
- [AMDGPU] Fix typo in comment [NFC] · 380ff31d
  Thomas Symalla authored Feb 22, 2022
  380ff31d
- [AARCH64][DAGCombine] Add combine for negation of CSEL absolute value pattern. · d6a9eec2
  Sunho Kim authored Feb 22, 2022
  d6a9eec2
- [RISCV] Add patterns for vector widening integer reduction instructions · 5acd9c49
  Jianjian GUAN authored Jan 19, 2022
  5acd9c49
- [MachineOutliner][AArch64] NFC: Split MBBs into "outlinable ranges" · d97f997e
  Jessica Paquette authored Feb 16, 2022
  d97f997e
- [AMDGPU] Remove redundand check in the SILoadStoreOptimizer · dc098156
  Stanislav Mekhanoshin authored Feb 21, 2022
  dc098156
Feb 21, 2022
- [RISCV] Optimize tail agnostic vmv.s.x which don't need to select tail value. · f7dfc5d1
  Zakk Chen authored Feb 21, 2022
  f7dfc5d1
- [RISCV] Teach shouldSinkOperands to sink splat operands of vp.fma intrinsics. · 90d24055
  Craig Topper authored Feb 21, 2022
  90d24055
- [AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors · 9fc1a0dc
  David Green authored Feb 21, 2022
  9fc1a0dc
- Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares." · 55c181a6
  Florian Hahn authored Feb 21, 2022
  55c181a6
- [AMDGPU] SILoadStoreOptimizer: avoid unbounded register pressure increases · 359a792f
  Jay Foad authored Jan 28, 2022
  359a792f
- [VE] v512i1 mask arithmetic isel · cf964eb5
  Simon Moll authored Feb 21, 2022
  cf964eb5
- [ARM] Remove unused lowerABS function. NFC · a6fb1bb3
  Craig Topper authored Feb 20, 2022
  a6fb1bb3