Commits · d779ee152ceff1fd52b3530014a6b10bbaa2d4b7 · Roger Ferrer / llvm-epi · GitLab

Mar 21, 2020
- [X86] getTargetShuffleAndZeroables - add insert_subvector(undef, sub, c) handling. · 25eb9056
  Simon Pilgrim authored Mar 21, 2020
  25eb9056
- [X86] Combine concat(shufps,shufps) -> shufps(concat,concat) · 4ceade04
  Simon Pilgrim authored Mar 21, 2020
  4ceade04
- [ValueTracking] Short-circuit computeKnownBitsAddSub(); NFCI · 7a62ea38
  Nikita Popov authored Mar 21, 2020
  7a62ea38
- Revert rGe6a7e3b5e3e7 "[X86][SSE] matchShuffleWithSHUFPD - add support for unary shuffles." · f424d51c
  Simon Pilgrim authored Mar 21, 2020
  f424d51c
- Revert rGd5d8569df14e95e2c53d167bd1b37995bcbec565 "Fix static analysis... · f9a86505
  Simon Pilgrim authored Mar 21, 2020
  f9a86505
- Fix static analysis warnings about classes with virtual methods not having virtual destructors · d5d8569d
  Simon Pilgrim authored Mar 20, 2020
  
  d5d8569d
- [InstCombine][X86] simplifyX86immShift - remove ConstantAggregateZero handling. NFC. · f00a4b53
  Simon Pilgrim authored Mar 20, 2020
  f00a4b53
- Fix Wdocumentation warning. NFCI. · ff3aae69
  Simon Pilgrim authored Mar 21, 2020
  
  ff3aae69
- [DAG] Don't permit EXTLOAD when combining FSHL/FSHR consecutive loads (PR45265) · c5fd9e38
  Simon Pilgrim authored Mar 21, 2020
  c5fd9e38
- [X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile · 85c30f33
  Fangrui Song authored Mar 19, 2020
  85c30f33
- Temporarily Revert "[X86] Reland D71360 Clean up UseInitArray initialization... · fc7233d7
  Eric Christopher authored Mar 20, 2020
  fc7233d7
- [ValueTracking] Fix usage of DataLayout::getTypeStoreSize() · 4f5af9d7
  Huihui Zhang authored Mar 20, 2020
  4f5af9d7
- Revert "Allow remapping the sysroot with -fdebug-prefix-map." · bde15de3
  Adrian Prantl authored Mar 20, 2020
  bde15de3
Mar 20, 2020
- Allow remapping the sysroot with -fdebug-prefix-map. · 6725c483
  Adrian Prantl authored Mar 18, 2020
  6725c483
- [VE] Fix -Wunused-private-field after D72598 and -Wdeprecated-declarations after D76348 · df4cc35e
  Fangrui Song authored Mar 20, 2020
  
  df4cc35e
- [ValueTracking][SVE] Fix getOffsetFromIndex for scalable vector. · 1993f95f
  Huihui Zhang authored Mar 20, 2020
  1993f95f
- [InstSimplify] Reorder checks to be more efficient; NFC · 417d6959
  Nikita Popov authored Mar 20, 2020
  417d6959
- [InstCombine] Remove known bits constant folding · 2b52e4e6
  Nikita Popov authored Mar 07, 2020
  2b52e4e6
- [LiveDebugValues] Speed up collectIDsForRegs, NFC · a2459433
  Vedant Kumar authored Mar 19, 2020
  a2459433
- [ADT] CoalescingBitVector: Avoid initial heap allocation, NFC · 4716ebb8
  Vedant Kumar authored Mar 19, 2020
  4716ebb8
- [X86] Reland D71360 Clean up UseInitArray initialization for X86ELFTargetObjectFile · 7899fe9d
  Fangrui Song authored Mar 19, 2020
  7899fe9d
- PR45181: Fix another invalid DIExpression combination · 63666533
  Vedant Kumar authored Mar 20, 2020
  63666533
- Cleanup the plumbing for DILineInfoSpecifier. [NFC - Try 2] · 5de4ba17
  Sterling Augustine authored Mar 19, 2020
  
  5de4ba17
- [InstCombine] Handle known shl nsw sign bit in SimplifyDemanded · 3205d1a8
  Nikita Popov authored Mar 20, 2020
  3205d1a8
- [DAGCombiner] Do not fold truncate(build_vector(..)) if it creates an illegal type · edcfb47f
  Pirama Arumuga Nainar authored Mar 17, 2020
  edcfb47f
- [X86] Prevent (bitcast (broadcast_load)) combine from producing vXf16 broadcast instructions. · 32fbea15
  Craig Topper authored Mar 20, 2020
  32fbea15
- [InstCombine][X86] simplifyX86immShift - convert variable in-range vector... · 34659de5
  Simon Pilgrim authored Mar 20, 2020
  34659de5
- [ARM,MVE] Add ACLE intrinsics for the vaddv/vaddlv family. · 1adfa4c9
  Simon Tatham authored Mar 20, 2020
  1adfa4c9
- [ARM,MVE] Add ACLE intrinsics for the vminv/vmaxv family. · 45a9945b
  Simon Tatham authored Mar 20, 2020
  45a9945b
- [DAGCombiner] Fix non-determinism problem related to argument evaluation order in visitFDIV · d168b777
  Bjorn Pettersson authored Mar 17, 2020
  d168b777
- AMDGPU: Move towards deprecating alignbit intrinsic · a950e3be
  Matt Arsenault authored Mar 19, 2020
  a950e3be
- [AMDGPU] Enable divergence driven ISel for ADD/SUB i64 · 6e34e718
  alex-t authored Mar 19, 2020
  6e34e718
- [ARM,CDE] Implement CDE unpredicated Q-register intrinsics · 969034b8
  Mikhail Maltsev authored Mar 20, 2020
  969034b8
- [ARM,CDE] Implement CDE S and D-register intrinsics · d22e6617
  Mikhail Maltsev authored Mar 20, 2020
  d22e6617
- [ARM,CDE] Implement GPR CDE intrinsics · 7a85e358
  Mikhail Maltsev authored Mar 20, 2020
  7a85e358
- [ValueTracking] Add some initial isKnownNonZero DemandedElts support (PR36319) · 7f764fa1
  Simon Pilgrim authored Mar 20, 2020
  
  7f764fa1
- [ValueTracking] Add computeKnownBits DemandedElts support to shift instructions (PR36319) · c1efdbcb
  Simon Pilgrim authored Mar 20, 2020
  
  c1efdbcb
- Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes" · baa6f6a7
  Adrian Kuegel authored Mar 20, 2020
  baa6f6a7
- [ARM] Change VDUP type to i32 for MVE · b3499f57
  David Green authored Mar 20, 2020
  b3499f57
- [RISCV] Select +0.0 immediate using fmv.{w,d}.x / fcvt.d.w · 3c24aee7
  Roger Ferrer authored Mar 20, 2020
  3c24aee7