Commits · d926465342497afef60cc7f191bf23d0bbd7a448 · Roger Ferrer / llvm-epi · GitLab

Sep 16, 2015
- [X86] Do not generate 64-bit pops of 32-bit GPRs. · d9264653
  Michael Kuperstein authored Sep 16, 2015
  d9264653
- Make the default triple optional by allowing an empty string · d178f4fc
  Mehdi Amini authored Sep 16, 2015
  d178f4fc
Sep 15, 2015
- [ShrinkWrapping] Add a test case for r247710. · 7b139762
  Quentin Colombet authored Sep 15, 2015
  7b139762
- [SystemZ] Fix assertion failure in tryBuildVectorShuffle · e861e644
  Ulrich Weigand authored Sep 15, 2015
  e861e644
- [WebAssembly] Implement int64-to-int32 conversion. · 311b488d
  Dan Gohman authored Sep 15, 2015
  311b488d
Sep 14, 2015
- Improve ISel using across lane min/max reduction · 34b9bd04
  Jun Bum Lim authored Sep 14, 2015
  34b9bd04
- [ARM] Extract shifts out of multiply-by-constant · 056e6786
  John Brawn authored Sep 14, 2015
  056e6786
Sep 13, 2015
- [X86][MMX] Added shuffle decodes for MMX/3DNow! shuffles. · f8f86ab1
  Simon Pilgrim authored Sep 13, 2015
  f8f86ab1
- AVX-512: Fixed a bug in OR/XOR operations for 512-bit FP values on KNL. · 8671fcbb
  Elena Demikhovsky authored Sep 13, 2015
  8671fcbb
Sep 12, 2015
- [x86] enable machine combiner reassociations for 128-bit vector logical integer insts (2nd try) · 8b960d22
  Sanjay Patel authored Sep 12, 2015
  8b960d22
- [X86] Added i1 vector sextload tests · 42c834ba
  Simon Pilgrim authored Sep 12, 2015
  42c834ba
- [X86][FMA] Refreshed fma tests · 779bcf3e
  Simon Pilgrim authored Sep 12, 2015
  779bcf3e
- revert r247506; need to verify changes in existing tests · 99f7370a
  Sanjay Patel authored Sep 12, 2015
  99f7370a
- [x86] enable machine combiner reassociations for 128-bit vector logical integer insts · 08755c7d
  Sanjay Patel authored Sep 12, 2015
  08755c7d
- [X86][SSE] Use general sext IR for (v)pmovsx stack folding tests · 8ee50e9c
  Simon Pilgrim authored Sep 12, 2015
  8ee50e9c
Sep 11, 2015
- Use function attribute "stackrealign" to decide whether stack · bc497c93
  Akira Hatanaka authored Sep 11, 2015
  bc497c93
- [X86] Make sure startproc/endproc are paired · 0e70598a
  David Majnemer authored Sep 11, 2015
  0e70598a
- [IR] Print the label operands of a catchpad like an invoke · 5dbee7ba
  Reid Kleckner authored Sep 11, 2015
  5dbee7ba
- [opaque pointer type] Add textual IR support for explicit type parameter for global aliases · 2f40830d
  David Blaikie authored Sep 11, 2015
  2f40830d
- [WinEH] Push and pop EBP for 32-bit funclets · da6dcc5d
  Reid Kleckner authored Sep 10, 2015
  da6dcc5d
Sep 10, 2015
- [SPARC] Switch to the Machine Scheduler. · 1f3e6af7
  James Y Knight authored Sep 10, 2015
  1f3e6af7
- Fix SEH state numbering algorithm to handle cleanupendpads · 7bb20bd6
  Reid Kleckner authored Sep 10, 2015
  7bb20bd6
- Tidy up some alias syntax to make explicit pointer type migration easier · a7970f3c
  David Blaikie authored Sep 10, 2015
  a7970f3c
- [WinEH] Fix single-block cleanup coloring · f3aff314
  Joseph Tremoulet authored Sep 10, 2015
  f3aff314
- Fix PR 24724 - The implicit register verifier shouldn't assume certain operand · 0153e599
  Alex Lorenz authored Sep 10, 2015
  0153e599
- AVX512: Implemented encoding and intrinsics for · 7f69a99c
  Igor Breger authored Sep 10, 2015
  7f69a99c
- [DAGCombine] Truncate BUILD_VECTOR operators if necessary when constant folding vectors · df9ce840
  Silviu Baranga authored Sep 10, 2015
  df9ce840
- [ARM] Do not use vtrn for vectorshuffle if the order is reversed · 8c995a93
  James Molloy authored Sep 10, 2015
  8c995a93
- Enable the shrink wrapping optimization for PPC64. · d3b904d4
  Kit Barton authored Sep 10, 2015
  d3b904d4
- [AArch64] Match FI+offset in STNP addressing mode. · 05541459
  Ahmed Bougacha authored Sep 10, 2015
  05541459
- [AArch64] Match base+offset in STNP addressing mode. · c0ac38d5
  Ahmed Bougacha authored Sep 10, 2015
  c0ac38d5
- [AArch64] Support selecting STNP. · b8886b51
  Ahmed Bougacha authored Sep 10, 2015
  b8886b51
- [WinEH] Add codegen support for cleanuppad and cleanupret · 78783912
  Reid Kleckner authored Sep 10, 2015
  78783912
Sep 09, 2015
- [SEH] Emit 32-bit SEH tables for the new EH IR · 94b704c4
  Reid Kleckner authored Sep 09, 2015
  94b704c4
- [WebAssembly] Update target datalayout strings. · 5e066842
  Dan Gohman authored Sep 09, 2015
  5e066842
- Revert "AVX512: Implemented encoding and intrinsics for vextracti64x4... · db7ea86b
  Renato Golin authored Sep 09, 2015
  db7ea86b
- [WebAssembly] Implement calls with void return types. · f71abef7
  Dan Gohman authored Sep 09, 2015
  f71abef7
- AMDGPU/SI: Fold operands through REG_SEQUENCE instructions · 9a197676
  Tom Stellard authored Sep 09, 2015
  9a197676
- AVX512: Implemented encoding and intrinsics for · ac29a829
  Igor Breger authored Sep 09, 2015
  ac29a829
- Fix PR 24633 - Handle undef values when parsing standalone constants. · b9a68dbc
  Alex Lorenz authored Sep 09, 2015
  b9a68dbc