Commits · d9dc114e2f6ab41192e4a7127924e426ab42feee · Roger Ferrer / llvm-epi · GitLab

Mar 10, 2018
- [X86][SSE] createVariablePermute - create index scaling helper. NFCI. · d9dc114e
  Simon Pilgrim authored Mar 10, 2018
  d9dc114e
- [X86][XOP] createVariablePermute - use VPPERM for v32i8 variable permutes · 8224241f
  Simon Pilgrim authored Mar 10, 2018
  8224241f
- AMDGPU: Fix crash when constant folding with physreg operand · cbda7ff4
  Matt Arsenault authored Mar 10, 2018
  cbda7ff4
- [X86] Add a missing EVEX instruction to EmitAnyX86InstComments. · b76ed82b
  Craig Topper authored Mar 10, 2018
  b76ed82b
- [X86] Move the AC_EVEX_2_VEX AsmComments enum to X86InstrInfo.h from X86InstComments.h. · f27016f3
  Craig Topper authored Mar 10, 2018
  f27016f3
- [X86] Rewrite printMasking code in X86InstComments to use TSFlags to determine... · 9804c67d
  Craig Topper authored Mar 10, 2018
  9804c67d
- Go back to sometimes assuming intristics are local. · 63c378d3
  Rafael Espindola authored Mar 10, 2018
  63c378d3
- Revert: r327172 "Correct load-op-store cycle detection analysis" · 042678bd
  Nirav Dave authored Mar 10, 2018
  042678bd
Mar 09, 2018
- [Power9] Code Cleaup and adding Comments for Power 9 Scheduler · 735817aa
  Stefan Pintilie authored Mar 09, 2018
  735817aa
- Correct load-op-store cycle detection analysis · 0fab4178
  Nirav Dave authored Mar 09, 2018
  0fab4178
- Improve Dependency analysis when doing multi-node Instruction Selection · d668f69e
  Nirav Dave authored Mar 09, 2018
  d668f69e
- [DAG] Enforce stricter NodeId invariant during Instruction selection · 071699bf
  Nirav Dave authored Mar 09, 2018
  071699bf
- Use branch funnels for virtual calls when retpoline mitigation is enabled. · 2974856a
  Peter Collingbourne authored Mar 09, 2018
  2974856a
- [X86][AVX] createVariablePermute - fix v2i64/v2f64 VPERMILPD index creation. · 2cd489fe
  Simon Pilgrim authored Mar 09, 2018
  2cd489fe
- [X86][SSE] createVariablePermute - move source vector canonicalization to top of function. NFCI. · 230d38b5
  Simon Pilgrim authored Mar 09, 2018
  230d38b5
- [AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space. · a7cb3112
  Farhana Aleen authored Mar 09, 2018
  a7cb3112
- Revert "[PowerPC] LSR tunings for PowerPC" · ef7c4976
  Stefan Pintilie authored Mar 09, 2018
  ef7c4976
- Tidyup comment that was destroyed by clang-format. NFCI. · 033a4167
  Simon Pilgrim authored Mar 09, 2018
  033a4167
- [X86][SSE] createVariablePermute - move index vector canonicalization to top of function. NFCI. · 322c521e
  Simon Pilgrim authored Mar 09, 2018
  322c521e
- [x86][aarch64] ask the backend whether it has a vector blend instruction · b4bd0a40
  Sebastian Pop authored Mar 09, 2018
  b4bd0a40
- [AMDGPU] Fixed V_DIV_FIXUP_F16 selection on GFX9 · c8127fc6
  Stanislav Mekhanoshin authored Mar 09, 2018
  c8127fc6
- [X86] Remove duplicate isel pattern. NFC · e7060b20
  Craig Topper authored Mar 09, 2018
  e7060b20
- [X86] Remove SRAs from v16i8 multiply lowering on sse2 targets · 784f1bbf
  Craig Topper authored Mar 09, 2018
  784f1bbf
Mar 08, 2018
- [X86][AVX] Pull out variable permute creation from LowerBUILD_VECTORAsVariablePermute. NFCI. · c2866800
  Simon Pilgrim authored Mar 08, 2018
  c2866800
- [Hexagon] Ignore indexed loads when handling unaligned loads · 480ab2bb
  Krzysztof Parzyszek authored Mar 08, 2018
  480ab2bb
- [Power9] Add more missing instructions to the Power 9 scheduler · 235fb927
  Stefan Pintilie authored Mar 08, 2018
  235fb927
- AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo · c3fe46bb
  Matt Arsenault authored Mar 08, 2018
  c3fe46bb
- [X86] Change X86::PMULDQ/PMULUDQ opcodes to take vXi64 type as input instead of vXi32. · a406796f
  Craig Topper authored Mar 08, 2018
  a406796f
- [WebAssembly] Add except_ref as a first-class type · 0de58729
  Heejin Ahn authored Mar 08, 2018
  0de58729
- [AArch64] Fix UB about shift amount exceeds data bit-width · a4259cd3
  Weiming Zhao authored Mar 08, 2018
  a4259cd3
- [X86] Fix some isel patterns that used aligned vector load instructions with unaligned predicates. · 7ff97797
  Craig Topper authored Mar 08, 2018
  7ff97797
- Delete code that is probably dead since r249303. · 06c06482
  Rafael Espindola authored Mar 08, 2018
  06c06482
- [X86][SSE] LowerBUILD_VECTORAsVariablePermute - reorder permute types. NFCI. · 68594ee2
  Simon Pilgrim authored Mar 07, 2018
  68594ee2
Mar 07, 2018
- [AArch64] Adjust the cost of integer vector division · f9bd871d
  Evandro Menezes authored Mar 07, 2018
  f9bd871d
- [AArch64] add missing pattern for insert_subvector undef · 33bdb3e0
  Sebastian Pop authored Mar 07, 2018
  33bdb3e0
- [X86] Remove unused function argument. NFC · 80ec0c31
  Craig Topper authored Mar 07, 2018
  80ec0c31
- [X86] Make the MUL->VPMADDWD work before op legalization on AVX1 targets.... · c3c15dd6
  Craig Topper authored Mar 07, 2018
  c3c15dd6
- [Hexagon] Rewrite non-HVX unaligned loads as pairs of aligned ones · 2c3edf05
  Krzysztof Parzyszek authored Mar 07, 2018
  2c3edf05
- [AMDGPU] Increased vector length for global/constant loads. · 89196642
  Farhana Aleen authored Mar 07, 2018
  89196642
- Revert "[AMDGPU] Widened vector length for global/constant address space." · 347d12b4
  Farhana Aleen authored Mar 07, 2018
  347d12b4