Commits · da7e78e18caed56900c7df208bf8ed98d94ac112 · Roger Ferrer / llvm-epi · GitLab

Dec 10, 2017
- [X86] Correct the _Int part of more scheduler model instrexes. Put _b in the... · 4e57776f
  Craig Topper authored Dec 10, 2017
  4e57776f
- [X86] Fix test case I failed ot update in r320279. · 29868dcb
  Craig Topper authored Dec 10, 2017
  29868dcb
- [X86] Fix bad regular expressions in the scheduler models. Question marks... · 391c6f95
  Craig Topper authored Dec 10, 2017
  391c6f95
- [AArch64] Improve loop unrolling performance on Cavium T99 · 5cc21e83
  Joel Jones authored Dec 09, 2017
  5cc21e83
- [X86] Use KMOV instructions to zero upper bits of vectors when possible. · f4e3044d
  Craig Topper authored Dec 09, 2017
  f4e3044d
Dec 09, 2017
- [X86] Improve lowering of vXi1 insert_subvectors to better utilize... · 5ac75d56
  Craig Topper authored Dec 09, 2017
  5ac75d56
- [X86] Don't use getTargetConstant for all 0s and all 1s mask vector. · 50453451
  Craig Topper authored Dec 09, 2017
  50453451
- [X86] When inserting into the upper bits of a vXi1 vector, make sure we shift... · 6504a8f8
  Craig Topper authored Dec 09, 2017
  6504a8f8
- [AVR] Fix two CodeGen tests · f7e8ec13
  Dylan McKay authored Dec 09, 2017
  f7e8ec13
- [X86] Improve lowering of concats of mask vectors to better optimize zero vector inputs. · b3e14ce9
  Craig Topper authored Dec 09, 2017
  b3e14ce9
- Relax unaligned access assertion when type is byte aligned · 80463fe6
  Dylan McKay authored Dec 09, 2017
  80463fe6
- [MachineOutliner] Outline calls · a249c4f5
  Jessica Paquette authored Dec 09, 2017
  a249c4f5
- Fix out-of-order stepping behavior in programs with sunk instructions. · 8bd9d6ad
  Paul Robinson authored Dec 09, 2017
  8bd9d6ad
Dec 08, 2017
- [WebAssembly] Reapply r319186: "Support bitcasted function addresses with varargs." · 3a762bf9
  Dan Gohman authored Dec 08, 2017
  3a762bf9
- [WebAssemby] Re-apply r320041: "Support main functions with alternate signatures." · 6736f590
  Dan Gohman authored Dec 08, 2017
  6736f590
- AMDGPU/GCN: Bring processors in sync with AMDGPUUsage · c40d9f2e
  Konstantin Zhuravlyov authored Dec 08, 2017
  c40d9f2e
- [X86] Teach lowering to only let through (insert_subvector (vXi1 zeros),... · 7f0d456e
  Craig Topper authored Dec 08, 2017
  7f0d456e
- [X86][X87] Tag x87 float compare instructions scheduler classes · 6415f56c
  Simon Pilgrim authored Dec 08, 2017
  6415f56c
- AMDGPU: image_getlod and image_getresinfo do not read memory · 856777d8
  Matt Arsenault authored Dec 08, 2017
  856777d8
- AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metadata is not available · e30f88f3
  Konstantin Zhuravlyov authored Dec 08, 2017
  e30f88f3
- [X86][SHA] Tag SHA instructions scheduler classes · 19d460b0
  Simon Pilgrim authored Dec 08, 2017
  19d460b0
- [X86][Haswell]: Updating the scheduling information for the Haswell subtarget. · 2cf601f2
  Gadi Haber authored Dec 08, 2017
  2cf601f2
- [AArch64] Avoid SIMD interleaved store instruction for Exynos. · 2c80e4c7
  Abderrazek Zaafrani authored Dec 08, 2017
  2c80e4c7
- Revert "[WebAssemby] Support main functions with alternate signatures." · 9e1baeda
  Derek Schuff authored Dec 08, 2017
  9e1baeda
- [X86] Handle alls version of vXi1 insert_vector_elt with a constant index... · 323ba39f
  Craig Topper authored Dec 08, 2017
  323ba39f
Dec 07, 2017
- Temporarily revert "[PowerPC] Allow tail calls of fastcc functions from C CallingConv functions." · a469acac
  Eric Christopher authored Dec 07, 2017
  a469acac
- [MachineOutliner] Fix offset overflow check · 59948666
  Jessica Paquette authored Dec 07, 2017
  59948666
- [AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output." · 9ebdbb43
  Mark Searles authored Dec 07, 2017
  9ebdbb43
- [AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output. · a84d2348
  Mark Searles authored Dec 07, 2017
  a84d2348
- [AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and... · d29f24ac
  Mark Searles authored Dec 07, 2017
  d29f24ac
- [X86] Fix InsertBitToMaskVector to only issue KSHIFTS of native size so that... · dfc79c7c
  Craig Topper authored Dec 07, 2017
  dfc79c7c
- [X86] Tag BMI/BMI2/TBM instructions scheduler classes · 386b23f1
  Simon Pilgrim authored Dec 07, 2017
  386b23f1
- [Hexagon] Generate HVX code for basic arithmetic operations · 039d4d92
  Krzysztof Parzyszek authored Dec 07, 2017
  039d4d92
- [X86][TBM] Add TBM scheduling tests · d2e93e76
  Simon Pilgrim authored Dec 07, 2017
  d2e93e76
- [X86] Rename function in recently added test case to not be 'main' returning 'void'. NFC · 5db260fc
  Craig Topper authored Dec 07, 2017
  5db260fc
- [X86] Tag SALC instructions scheduler class · 2983b469
  Simon Pilgrim authored Dec 07, 2017
  2983b469
- [X86] Add LAHF/SAHF scheduling test · ffce0d8f
  Simon Pilgrim authored Dec 07, 2017
  ffce0d8f
- [X86] Add SALC scheduling test · a383f842
  Simon Pilgrim authored Dec 07, 2017
  a383f842
- [X86] Tag LZCNT/TZCNT instructions scheduler classes · f1d599ad
  Simon Pilgrim authored Dec 07, 2017
  f1d599ad
- [DAGCombiner] eliminate shuffle of insert element · 9012391a
  Sanjay Patel authored Dec 07, 2017
  9012391a