Commits · dad848280d3b740524803595d463510e1090ab59 · Roger Ferrer / llvm-epi · GitLab

Apr 01, 2020
- [Target][ARM] Change VPTMaskValues to the correct encoding · dad84828
  Pierre-vh authored Mar 13, 2020
  dad84828
Mar 31, 2020
- Remove "mask" operand from shufflevector. · 1ee6ec2b
  Eli Friedman authored Mar 31, 2020
  1ee6ec2b
- [Alignment][NFC] Deprecate MachineMemOperand::getMachineMemOperand version... · 998118c3
  Guillaume Chatelet authored Mar 31, 2020
  998118c3
- [Alignment][NFC] Transitionning more getMachineMemOperand call sites · b9810988
  Guillaume Chatelet authored Mar 31, 2020
  b9810988
- [ARM] Fix qdadd operand order · 2c5f43f9
  David Green authored Mar 30, 2020
  2c5f43f9
- [Alignment][NFC] Transitionning more getMachineMemOperand call sites · c9d5c195
  Guillaume Chatelet authored Mar 31, 2020
  c9d5c195
- [RISCV] ELF attribute section for RISC-V. · 581ba352
  Kai Wang authored Feb 04, 2020
  581ba352
- [Alignment][NFC] Transition to inferAlignFromPtrInfo · 0de874ad
  Guillaume Chatelet authored Mar 31, 2020
  0de874ad
Mar 30, 2020
- [ARM][LowOverheadLoops] Add horizontal reduction support · 94b195ff
  Sam Parker authored Mar 30, 2020
  94b195ff
- [Alignment][NFC] Return Align for SelectionDAGNodes::getOriginalAlignment/getAlignment · b91535f6
  Guillaume Chatelet authored Mar 27, 2020
  b91535f6
- [ARM] MVE VMOV.i64 · c9eaed51
  David Green authored Mar 28, 2020
  c9eaed51
Mar 27, 2020
- Fix denormal-fp-math flag and attribute interaction · 0ab5b5b8
  Matt Arsenault authored Mar 11, 2020
  0ab5b5b8
- [MC][ARM] Make .reloc support arbitrary relocation types · c3895261
  Fangrui Song authored Mar 24, 2020
  c3895261
- [Alignment][NFC] MachineMemOperand::getAlign/getBaseAlign · 74eac903
  Guillaume Chatelet authored Mar 27, 2020
  74eac903
- [ARM][LowOverheadLoops] DoubleWidthResult instructions canGenerateZeros · d7084fa3
  Sam Parker authored Mar 27, 2020
  d7084fa3
- [ARM][MVE] Add DoubleWidthResult flag · 0e6aa083
  Sam Parker authored Mar 27, 2020
  0e6aa083
- [ARM] Fix MVE VCMPr f16 pattern · 8689f98e
  David Green authored Mar 27, 2020
  8689f98e
- [MCInstPrinter] Add parameter `Address` to printCustomAliasOperand. NFC · 6728a9ae
  Fangrui Song authored Mar 27, 2020
  6728a9ae
- [MCInstPrinter] Add parameter `Address` to MCInstPrinter::printAliasInstr. NFC · b3cc5dce
  Fangrui Song authored Mar 26, 2020
  b3cc5dce
Mar 26, 2020
- [Alignment][NFC] Use llvmTargetFrameLowering::getStackAlign · b727aabc
  Guillaume Chatelet authored Mar 26, 2020
  b727aabc
- [MCInstPrinter] Pass `Address` parameter to MCOI::OPERAND_PCREL typed operands. NFC · 5fad05e8
  Fangrui Song authored Mar 22, 2020
  5fad05e8
- [PATCH] [ARM] ARMv8.6-a command-line + BFloat16 Asm Support · 71ae267d
  Ties Stuij authored Mar 26, 2020
  71ae267d
- [ARM] Sink splats to vector float instructions · 37b9cc8f
  David Green authored Mar 25, 2020
  37b9cc8f
Mar 25, 2020
- [ARM,CDE] Implement predicated Q-register CDE intrinsics · bb4da94e
  Mikhail Maltsev authored Mar 25, 2020
  bb4da94e
- [ARM] Move ConstantIsland and LowOverheadLoops Passes. · bd069ad3
  Yvan Roux authored Mar 25, 2020
  bd069ad3
- [ARM][MVE] Add HorizontalReduction flag · e8725020
  Sam Parker authored Mar 25, 2020
  e8725020
Mar 24, 2020
- [ARM] Fold VMOVrh VLDR to LDRH · f8c79b94
  David Green authored Mar 24, 2020
  f8c79b94
- [ARM] Don't split trunc stores that can be better handled as VMOVN · 1232cfa3
  David Green authored Mar 24, 2020
  1232cfa3
- [ARM][LowOverheadLoops] Add checks for narrowing · 94cacebc
  Sam Parker authored Mar 24, 2020
  94cacebc
- [ARM][MVE] Add target flag for narrowing insts · 6f86e6bf
  Sam Parker authored Mar 24, 2020
  6f86e6bf
Mar 20, 2020
- [ARM,MVE] Add ACLE intrinsics for the vaddv/vaddlv family. · 1adfa4c9
  Simon Tatham authored Mar 20, 2020
  1adfa4c9
- [ARM,MVE] Add ACLE intrinsics for the vminv/vmaxv family. · 45a9945b
  Simon Tatham authored Mar 20, 2020
  45a9945b
- [ARM,CDE] Implement CDE unpredicated Q-register intrinsics · 969034b8
  Mikhail Maltsev authored Mar 20, 2020
  969034b8
- [ARM,CDE] Implement CDE S and D-register intrinsics · d22e6617
  Mikhail Maltsev authored Mar 20, 2020
  d22e6617
- [ARM,CDE] Implement GPR CDE intrinsics · 7a85e358
  Mikhail Maltsev authored Mar 20, 2020
  7a85e358
- [ARM] Change VDUP type to i32 for MVE · b3499f57
  David Green authored Mar 20, 2020
  b3499f57
Mar 19, 2020
- [MC][ARM] add implicit immediate form for ldrsbt/ldrht/ldrsht · f8756366
  Stefan Agner authored Mar 01, 2020
  f8756366
- Reland D73534: [DebugInfo] Enable the debug entry values feature by default · d9b96210
  Djordje Todorovic authored Mar 19, 2020
  d9b96210
Mar 18, 2020
- Remove CompositeType class. · e24e95fe
  Eli Friedman authored Mar 03, 2020
  e24e95fe
- [ARM,MVE] Add intrinsics for the VQDMLAD family. · e13d153c
  Simon Tatham authored Mar 18, 2020
  e13d153c