Commits · db4bc667afe6decb6486b8f2ea643e5579a7a112 · Roger Ferrer / llvm-epi · GitLab

Aug 02, 2016
- [NVPTX] remove unnecessary named metadata update that happens to break debug info. · db4bc667
  Artem Belevich authored Aug 02, 2016
  db4bc667
- [LoopVectorize] Change comment for isOutOfScope in collectLoopUniforms, NFC · dc7001af
  Wei Mi authored Aug 02, 2016
  dc7001af
- AArch64: properly calculate cmpxchg status in FastISel. · 1021d893
  Tim Northover authored Aug 02, 2016
  1021d893
- Fixes for post-commit review comments on r277480 · 26fcea91
  Daniel Berlin authored Aug 02, 2016
  26fcea91
- [IRCE] Rename variable; NFC · 83a72850
  Sanjoy Das authored Aug 02, 2016
  83a72850
- [IRCE] Preserve DomTree and LCSSA · f45e03e2
  Sanjoy Das authored Aug 02, 2016
  f45e03e2
- AMDGPU: Stay in WQM for non-intrinsic stores · 8a482b33
  Nicolai Haehnle authored Aug 02, 2016
  8a482b33
- [LoopUnroll] Ensure we create prolog loops in simplified form. · d9b6ad3c
  Michael Zolotukhin authored Aug 02, 2016
  d9b6ad3c
- Fix handling of end-of-line preprocessor comments Attempt 2 · 9263ae3b
  Nirav Dave authored Aug 02, 2016
  9263ae3b
- AMDGPU: Track physical registers in SIWholeQuadMode · bef0e90c
  Nicolai Haehnle authored Aug 02, 2016
  bef0e90c
- [Hexagon] Prefer _io over _rr for 64-bit store with constant offset · 962932c2
  Krzysztof Parzyszek authored Aug 02, 2016
  962932c2
- [Hexagon] Remove unused option · 74daece1
  Krzysztof Parzyszek authored Aug 02, 2016
  74daece1
- [Hexagon] Improvements to address mode checks in TargetLowering · 3e409e12
  Krzysztof Parzyszek authored Aug 02, 2016
  3e409e12
- [MC] Fix Intel Operand assembly parsing for .set ids · 8601ac11
  Nirav Dave authored Aug 02, 2016
  8601ac11
- MSVC 2013 does not implement C++11 unions properly, so remove the anoymous union for now, · de4be653
  Daniel Berlin authored Aug 02, 2016
  de4be653
- [GlobalISel] Set the Selected MF property. · bfaddd99
  Ahmed Bougacha authored Aug 02, 2016
  bfaddd99
- [GlobalISel] Verify Selected MF property. · b14e944c
  Ahmed Bougacha authored Aug 02, 2016
  b14e944c
- [GlobalISel] Add Selected MachineFunction property. · b109d518
  Ahmed Bougacha authored Aug 02, 2016
  b109d518
- Rewrite the use optimizer to be less memory intensive and 50% faster. · c43aa5a5
  Daniel Berlin authored Aug 02, 2016
  c43aa5a5
- [LVI] NFC. Sink a condition type check from the caller down to getValueFromCondition · 2e19f593
  Artur Pilipenko authored Aug 02, 2016
  2e19f593
- [GlobalISel] Verify RegBankSelected MF property. · 3681c772
  Ahmed Bougacha authored Aug 02, 2016
  3681c772
- [GlobalISel] Add RegBankSelected MachineFunction property. · 24712655
  Ahmed Bougacha authored Aug 02, 2016
  24712655
- [LV] Generate both scalar and vector integer induction variables · 18d88983
  Matthew Simpson authored Aug 02, 2016
  18d88983
- [GlobalISel] Set, require, and verify Legalized MF property. · 24d0d4d2
  Ahmed Bougacha authored Aug 02, 2016
  24d0d4d2
- [AArch64][GlobalISel] Mark basic binops/memops as legal. · ad30db32
  Ahmed Bougacha authored Aug 02, 2016
  ad30db32
- [GlobalISel] Add Legalized MachineFunction property. · 0d7b0cb8
  Ahmed Bougacha authored Aug 02, 2016
  0d7b0cb8
- Revert "[MC] Fix handling of end-of-line preprocessor comments" · f94cd9df
  Nirav Dave authored Aug 02, 2016
  f94cd9df
- [WebAssembly] Remove a README.txt entry that is now implemented. · c558fe20
  Dan Gohman authored Aug 02, 2016
  c558fe20
- [LVI] NFC. Fix a typo getValueFromFromCondition -> getValueFromCondition · 2a8f96f5
  Artur Pilipenko authored Aug 02, 2016
  2a8f96f5
- [CodeGen] Generalize MachineFunctionProperties::print comma handling. · c8454a77
  Ahmed Bougacha authored Aug 02, 2016
  c8454a77
- [LV] Untangle the concepts of uniform and scalar · 58f56288
  Matthew Simpson authored Aug 02, 2016
  58f56288
- [MC] Fix handling of end-of-line preprocessor comments · 9b0ee9c5
  Nirav Dave authored Aug 02, 2016
  9b0ee9c5
- [ARM] Improve smul* and smla* isel for Thumb2 · 18bc3a00
  Sam Parker authored Aug 02, 2016
  18bc3a00
- HexagonVectorPrint.cpp: Fix r277370. Don't use getInstrVecReg() in the... · 3f704497
  NAKAMURA Takumi authored Aug 02, 2016
  3f704497
- [GlobalISel] Don't RegBankSelect target-specific instructions. · 45eb3b94
  Ahmed Bougacha authored Aug 02, 2016
  45eb3b94
- [GlobalISel] Don't legalize non-generic instructions. · faf8e9f8
  Ahmed Bougacha authored Aug 02, 2016
  faf8e9f8
- [GlobalISel] Const-ify MachineInstrs passed to MachineLegalizer. · f49ab9af
  Ahmed Bougacha authored Aug 02, 2016
  f49ab9af
- [mips] Update the P5600 scheduler for isComplete = 1 · 6c3591d3
  Simon Dardis authored Aug 02, 2016
  6c3591d3
- [ARM] Some saturation instructions not DSP-only · 849f7371
  Bernard Ogden authored Aug 02, 2016
  849f7371
- [LoadStoreVectorizer] Don't use a linear walk for an existence check in a SmallPtrSet · a0053cc0
  Benjamin Kramer authored Aug 02, 2016
  a0053cc0