Commits · dbbaca0e1b5d9a6e36ffdf523c946f02fd6c2357 · Roger Ferrer / llvm-epi · GitLab

Feb 24, 2016
- [InstCombine] enable optimization of casted vector xor instructions · dbbaca0e
  Sanjay Patel authored Feb 24, 2016
  dbbaca0e
- add test to show missing bitcasted vector xor fold · 3a74fb51
  Sanjay Patel authored Feb 24, 2016
  3a74fb51
- `MSP430InstrInfo::loadRegFromStackSlot` forgets to set register def. · 064dbac2
  Anton Korobeynikov authored Feb 24, 2016
  064dbac2
- [X86][SSE41] Combine vector blends with zero · 3b6feeaa
  Simon Pilgrim authored Feb 24, 2016
  3b6feeaa
- [X86][SSE41] Combine insertion of zero scalars into vector blends with zero · dd01f700
  Simon Pilgrim authored Feb 24, 2016
  dd01f700
- [AMDGPU] Assembler: Simplify handling of optional operands · 4f073ca7
  Nikolay Haustov authored Feb 24, 2016
  4f073ca7
- NFC. Move isDereferenceable to Loads.h/cpp · 31bcca47
  Artur Pilipenko authored Feb 24, 2016
  31bcca47
- NFC. Move getAlignment helper function from ValueTracking to Value class. · ae51afc5
  Artur Pilipenko authored Feb 24, 2016
  ae51afc5
- [X86][SSE] Fixed vector rotation test name typo · e1bb13d6
  Simon Pilgrim authored Feb 24, 2016
  e1bb13d6
- [AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields) · 3c728e43
  Nikolay Haustov authored Feb 24, 2016
  3c728e43
- [SimplifyCFG] Do not blindly remove unreachable blocks · ec72e372
  David Majnemer authored Feb 24, 2016
  ec72e372
- [CodeView] Describe variables live in x87 registers · e2ad7375
  David Majnemer authored Feb 24, 2016
  e2ad7375
- [X86][SSE] Don't get target shuffle operands prematurely. · c291c037
  Simon Pilgrim authored Feb 24, 2016
  c291c037
- [LLVM][AVX512][PSHUFHW ][PSHUFLW ] Change imm8 to int · a1f2d27d
  Michael Zuckerman authored Feb 24, 2016
  a1f2d27d
- AVX512: Add vpmovzxbw/d/q ,vpmovzxw/d/q ,vpmovzxbdq lowering patterns that... · c7ba5699
  Igor Breger authored Feb 24, 2016
  c7ba5699
- X86: Wrap a helper for an assert in #ifndef NDEBUG · 38e5217b
  Justin Bogner authored Feb 24, 2016
  38e5217b
- AMDGPU: Check cheaper condition before SignBitIsZero · cd09961f
  Matt Arsenault authored Feb 24, 2016
  cd09961f
- [InstCombine] refactor visitOr() to use foldCastedBitwiseLogic() · 75b4ae25
  Sanjay Patel authored Feb 23, 2016
  75b4ae25
- [doc] Obtaining help on LLVM's CUDA support. · bec78181
  Jingyue Wu authored Feb 23, 2016
  bec78181
Feb 23, 2016
- Revert "[WebAssembly] Stackify code emitted by eliminateFrameIndex" · f9c0a5c3
  Derek Schuff authored Feb 23, 2016
  f9c0a5c3
- minimize test and use FileCheck · 55a2b244
  Sanjay Patel authored Feb 23, 2016
  55a2b244
- AArch64: rename compact unwind forms back to UNWIND_ARM64_*. NFC. · 87442c11
  Tim Northover authored Feb 23, 2016
  87442c11
- [WebAssembly] Stackify code emitted by eliminateFrameIndex · b21570cc
  Derek Schuff authored Feb 23, 2016
  b21570cc
- [CMake] Create an install-distribution target driven by LLVM_DISTRIBUTION_COMPONENTS · c90e12fe
  Chris Bieneman authored Feb 23, 2016
  c90e12fe
- ARM: fix handling of movw/movt relocations with addend. · b9edc5ca
  Tim Northover authored Feb 23, 2016
  b9edc5ca
- [AArch64] Generate csinv instruction more often · 27b1ded4
  Geoff Berry authored Feb 23, 2016
  27b1ded4
- Fix comment · b439c7a1
  Xinliang David Li authored Feb 23, 2016
  b439c7a1
- Revert r261633 "Supporting all entities declared in lexical scope in LLVM debug info." · d3661cd1
  Hans Wennborg authored Feb 23, 2016
  d3661cd1
- [X86ISelLowering] Stop typing the same return over and over and over. · 62b7f7a3
  Davide Italiano authored Feb 23, 2016
  62b7f7a3
- Fix PR25339: ARM Constant Island · 5e0c3ebe
  Weiming Zhao authored Feb 23, 2016
  5e0c3ebe
- [WebAssembly] Add TODO comment to revisit red zone size · 770bdfe3
  Derek Schuff authored Feb 23, 2016
  770bdfe3
- [WebAssembly] Implement red zone for user stack · 4b3bb213
  Derek Schuff authored Feb 23, 2016
  4b3bb213
- [InstCombine] improve readability ; NFCI · 713f25e0
  Sanjay Patel authored Feb 23, 2016
  713f25e0
- [WinEH] Don't inline an 'unwinds to caller' cleanupret into funclets which locally unwind · 223538f7
  David Majnemer authored Feb 23, 2016
  223538f7
- [InstCombine] less indenting; NFC · 7d0d810c
  Sanjay Patel authored Feb 23, 2016
  7d0d810c
- [AArch64] Fix fastcc -tailcallopt epilog code generation. · a1c6269c
  Geoff Berry authored Feb 23, 2016
  a1c6269c
- [InstCombine] add helper function to foldCastedBitwiseLogic() ; NFCI · 40e7ba00
  Sanjay Patel authored Feb 23, 2016
  40e7ba00
- Silencing a signed vs unsigned mismatch. · 8374c1f7
  Aaron Ballman authored Feb 23, 2016
  8374c1f7
- [AArch64] Fix comment typo in Cyclone scheduling defs. NFC. · 44a6d443
  Chad Rosier authored Feb 23, 2016
  44a6d443
- Supporting all entities declared in lexical scope in LLVM debug info. · fc8f2967
  Amjad Aboud authored Feb 23, 2016
  fc8f2967