Commits · dc9088a10ee93129e05934ca49be9aca81f13c20 · Roger Ferrer / llvm-epi · GitLab

Oct 03, 2015
- AMDGPU/SI: Remove unused tablegen multiclass · dc9088a1
  Tom Stellard authored Oct 03, 2015
  dc9088a1
- [WebAssembly] Rename setlocal to set_local to match the spec. · 6a050f30
  Dan Gohman authored Oct 03, 2015
  6a050f30
Oct 02, 2015
- [WebAssembly] Fix CFG stackification of nested loops. · e3e4a5ff
  Dan Gohman authored Oct 02, 2015
  e3e4a5ff
- [WebAssembly] Support calls marked as "tail", fastcc, and coldcc. · 9cc692b0
  Dan Gohman authored Oct 02, 2015
  9cc692b0
- [WebAssembly] Add a resize_memory intrinsic. · baba8c64
  Dan Gohman authored Oct 02, 2015
  baba8c64
- [WebAssembly] Add a memory_size intrinsic. · 72f1692a
  Dan Gohman authored Oct 02, 2015
  72f1692a
- AMDGPU/SI: Add verifier check for exec reads · d092a068
  Matt Arsenault authored Oct 02, 2015
  d092a068
- Actually switch the arch when we see .arch. PR21695 · 4b5507a0
  Roman Divacky authored Oct 02, 2015
  4b5507a0
- ARM: diagnose invalid local fixups on Thumb1 · 8d67b8e0
  Tim Northover authored Oct 02, 2015
  8d67b8e0
- ARM: correctly align constant pool value on Thumb1 targets. · 956b008d
  Tim Northover authored Oct 02, 2015
  956b008d
- [ARM] Typo. NFC. · 1f385618
  Chad Rosier authored Oct 02, 2015
  1f385618
- Reapply r249121 : "[FastISel][x86] Teach how to select SSE2/AVX bitcasts... · 77f62652
  Andrea Di Biagio authored Oct 02, 2015
  77f62652
- Revert: [FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types. · 45874e67
  Andrea Di Biagio authored Oct 02, 2015
  45874e67
- [mips][microMIPS] Fix an issue with selecting sqrt instruction in LLVM backend · 9ffdfa59
  Zoran Jovanovic authored Oct 02, 2015
  9ffdfa59
- [FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types. · cb334561
  Andrea Di Biagio authored Oct 02, 2015
  cb334561
- AMDGPU: Fix unused variable warning in release build · b733f005
  Matt Arsenault authored Oct 01, 2015
  b733f005
- AMDGPU: Move SIFixSGPRLiveRanges to be a regalloc pass · b87fc229
  Matt Arsenault authored Oct 01, 2015
  b87fc229
- Fix relocation used for GOT references in non-PIC mode. Fix relocations · c8d50d63
  Joerg Sonnenberger authored Oct 01, 2015
  c8d50d63
Oct 01, 2015
- AMDGPU: Merge if and switch · d2c7589f
  Matt Arsenault authored Oct 01, 2015
  d2c7589f
- AMDGPU: Remove dead code · db7f0ef3
  Matt Arsenault authored Oct 01, 2015
  db7f0ef3
- AMDGPU: Make SIInsertWaits about a factor of 4 faster · d1d499aa
  Matt Arsenault authored Oct 01, 2015
  d1d499aa
- [WinEH] Emit __C_specific_handler tables for the new IR · fc64fae6
  Reid Kleckner authored Oct 01, 2015
  fc64fae6
- AMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass · e9f8b249
  Tom Stellard authored Oct 01, 2015
  e9f8b249
- [WinEH] Make FuncletLayout more robust against catchret · f828a0cc
  David Majnemer authored Oct 01, 2015
  f828a0cc
- [AArch64] Deprecate a command-line option used for testing. · f11d040f
  Chad Rosier authored Oct 01, 2015
  f11d040f
- [SystemZ] Add some generic (floating point support) load instructions. · 12629324
  Jonas Paulsson authored Oct 01, 2015
  12629324
- AMDGPU: Add MEM_RAT STORE_TYPED. · e0e582c9
  Tom Stellard authored Oct 01, 2015
  e0e582c9
- AMDGPU: Factor out EOP query. · c0f0fba2
  Tom Stellard authored Oct 01, 2015
  c0f0fba2
- Revert r248959, "[WinEH] Emit int3 after noreturn calls on Win64" · 1ed20db7
  NAKAMURA Takumi authored Oct 01, 2015
  1ed20db7
- [SystemZ] Add assembly instructions for obtaining clock values as well as CPU features · cf1670a0
  Ulrich Weigand authored Oct 01, 2015
  cf1670a0
- [AArch64] Hoist commonly failing check. NFC. · b7c5b910
  Chad Rosier authored Oct 01, 2015
  b7c5b910
- [AArch64] Rename variable to improve readability. NFC. · 0b15e7c6
  Chad Rosier authored Oct 01, 2015
  0b15e7c6
- [AArch64] Update comment to reflect reality. · 7a83d770
  Chad Rosier authored Oct 01, 2015
  7a83d770
- [mips][microMIPS] Implement CACHEE, WRPGPR and WSBH instructions · 2960f3a3
  Zoran Jovanovic authored Oct 01, 2015
  2960f3a3
- [ARM] More care with Thumb1 writeback in ARMLoadStoreOptimizer · 290183d7
  Scott Douglass authored Oct 01, 2015
  290183d7
- AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order · 1f0e7bbc
  Tom Stellard authored Oct 01, 2015
  1f0e7bbc
- [X86] Don't custom-lower vNi32 uint_to_fp when unsafe-fp-math. · 23a0d1a1
  Ahmed Bougacha authored Oct 01, 2015
  23a0d1a1
- [WinEH] Emit int3 after noreturn calls on Win64 · 6dec87a8
  Reid Kleckner authored Sep 30, 2015
  6dec87a8
- [x86] enable machine combiner reassociations for 256-bit vector logical integer insts · a114a10b
  Sanjay Patel authored Sep 30, 2015
  a114a10b
Sep 30, 2015
- Fix -Wsign-compare warning · 757908e5
  David Blaikie authored Sep 30, 2015
  757908e5