Commits · dd58705af6442226b9de3adab18f826623c5af51 · Roger Ferrer / llvm-epi · GitLab

Dec 19, 2015
- AMDGPU: fix overlapping copies in copyPhysReg · dd58705a
  Nicolai Haehnle authored Dec 19, 2015
  dd58705a
Dec 18, 2015
- Revert "Enhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInst" · 708a91a1
  Rafael Espindola authored Dec 18, 2015
  708a91a1
- Enhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInst · 51a24706
  Jun Bum Lim authored Dec 18, 2015
  51a24706
- [Hexagon] Add PIC support · 21dc8bdd
  Krzysztof Parzyszek authored Dec 18, 2015
  21dc8bdd
- [AArch64] Promote loads from stores · 3509d64c
  Jun Bum Lim authored Dec 18, 2015
  3509d64c
- [X86] Use push-pop for materializing small constants under 'minsize' · a6a2e512
  Hans Wennborg authored Dec 17, 2015
  a6a2e512
Dec 17, 2015
- Revert "[AArch64] Add DAG combine for extract extend pattern" · 13dddb07
  Matthew Simpson authored Dec 17, 2015
  13dddb07
- [WebAssembly] Switch WebAssemblyMCAsmInfo.h from MCAsmInfo to MCAsmInfoELF. · 670a60ed
  Dan Gohman authored Dec 17, 2015
  670a60ed
- AMDGPU/SI: Reserve appropriate number of sgprs for flat scratch init. · caaa3aa0
  Tom Stellard authored Dec 17, 2015
  caaa3aa0
- [AArch64] Add DAG combine for extract extend pattern · 4355e404
  Matthew Simpson authored Dec 17, 2015
  4355e404
- [X86] Add option for enabling LEA optimization pass, by Andrey Turetsky · 7b72b658
  Alexey Bataev authored Dec 17, 2015
  7b72b658
- Fix PR25838. · b9e8d483
  Cong Hou authored Dec 17, 2015
  b9e8d483
- [WebAssembly] Fix legalization of shift operators on large integer types. · 41729538
  Dan Gohman authored Dec 16, 2015
  41729538
- [WebAssembly] Implement eliminateCallFramePseudo · 8bb5f292
  Derek Schuff authored Dec 16, 2015
  8bb5f292
- Fix funciton->function typo. · bfba5724
  Eric Christopher authored Dec 16, 2015
  bfba5724
Dec 16, 2015
- CXX_FAST_TLS calling convention: performance improvement for AArch64. · cbe4f941
  Manman Ren authored Dec 16, 2015
  cbe4f941
- [WebAssembly] Print an extra local decl when the user stack pointer is used · 45cd5a79
  Derek Schuff authored Dec 16, 2015
  45cd5a79
- [WebAssembly] Fix the CFG Stackifier to handle unoptimized branches · b3aa1eca
  Dan Gohman authored Dec 16, 2015
  b3aa1eca
- [WebAssembly] Use the new offset syntax for memory operands in inline asm. · e2831b4e
  Dan Gohman authored Dec 16, 2015
  e2831b4e
- [SystemZ] Fix assertion failure in adjustSubwordCmp · 47f36493
  Ulrich Weigand authored Dec 16, 2015
  47f36493
- [Hexagon] Make memcpy lowering thread-safe · b51460cf
  Tobias Edler von Koch authored Dec 16, 2015
  b51460cf
- [WebAssembly] Support more kinds of inline asm operands · 30a42bf5
  Dan Gohman authored Dec 16, 2015
  30a42bf5
- [X86] Improve shift combining · e75e6e2a
  Michael Kuperstein authored Dec 16, 2015
  e75e6e2a
- Remove FileCheck from test case token_landingpad.ll. · e2222fdf
  Chen Li authored Dec 16, 2015
  e2222fdf
- Fixed test case in rL255749: [SelectionDAGBuilder] Adds support for landingpads of token type. · 3e0da9de
  Chen Li authored Dec 16, 2015
  3e0da9de
- [SelectionDAGBuilder] Adds support for landingpads of token type · 3e8330a1
  Chen Li authored Dec 16, 2015
  3e8330a1
- [IR] Add support for floating pointer atomic loads and stores · 61a24ab6
  Philip Reames authored Dec 16, 2015
  61a24ab6
- [WinEH] Make llvm.x86.seh.recoverfp work on x64 · 7850c9f5
  Reid Kleckner authored Dec 15, 2015
  7850c9f5
- AMDGPU/SI: Set the code object work group segment size when targeting HSA · 7750f4ed
  Tom Stellard authored Dec 15, 2015
  7750f4ed
- [x86] inline calls to fmaxf / llvm.maxnum.f32 using maxss (PR24475) · 271efcdf
  Sanjay Patel authored Dec 15, 2015
  271efcdf
Dec 15, 2015
- AMDGPU/SI: Set the code objects private segment size when targeting HSA. · a495307e
  Tom Stellard authored Dec 15, 2015
  a495307e
- AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA · 29dd05e9
  Tom Stellard authored Dec 15, 2015
  29dd05e9
- [WebAssembly] Implement instruction selection for constant offsets in addresses. · 4b9d7916
  Dan Gohman authored Dec 15, 2015
  4b9d7916
- [WinEH] Use operand bundles to describe call sites · 3bb88c02
  David Majnemer authored Dec 15, 2015
  3bb88c02
- AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instructions · a6f24c65
  Tom Stellard authored Dec 15, 2015
  a6f24c65
- [Sparc] Fix handling of double incoming arguments on sparc little-endian. · 33beb243
  James Y Knight authored Dec 15, 2015
  33beb243
- [X86] MOVPC32r should only emit CFI adjustments when needed · 53946bf8
  Michael Kuperstein authored Dec 15, 2015
  53946bf8
- [X86] Smaller code for materializing 32-bit 1 and -1 constants · 08d5905b
  Hans Wennborg authored Dec 15, 2015
  08d5905b
- [Hexagon] Preprocess mapped instructions before lowering to MC · 372bd808
  Krzysztof Parzyszek authored Dec 15, 2015
  372bd808
- AMDGPU/SI: Add llvm.amdgcn.mbcnt.* intrinsics · 43f52df0
  Tom Stellard authored Dec 15, 2015
  43f52df0