Commits · dd8bbb7c5eb66c4e9880cbdc441a6958578177f6 · Roger Ferrer / llvm-epi · GitLab

Aug 06, 2015
- Revert "Divide the primitive size in bits by eight so the initial load's... · a02ac604
  Renato Golin authored Aug 06, 2015
  a02ac604
- [X86] Improve EmitLoweredSelect for contiguous CMOV pseudo instructions. · 868dc654
  Michael Kuperstein authored Aug 06, 2015
  868dc654
- COFF: Assign the correct symbol type to internal functions. · e834f420
  Peter Collingbourne authored Aug 06, 2015
  e834f420
- MIR Serialization: Initial serialization of the machine operand target flags. · 49873a83
  Alex Lorenz authored Aug 06, 2015
  49873a83
- Revert "Make sure all temporary files get created under %T." · b5dce473
  Frederic Riss authored Aug 05, 2015
  b5dce473
- [dsymutil] Update source used to generate test binary. · 2a6e4451
  Frederic Riss authored Aug 05, 2015
  2a6e4451
- [NVPTX] Use LDG for pointer induction variables. · 5cbc7d29
  Bjarke Hammersholt Roune authored Aug 05, 2015
  5cbc7d29
- Make sure all temporary files get created under %T. · d41611cf
  Artem Belevich authored Aug 05, 2015
  d41611cf
- [dsymutil] Add support for the -arch option. · ae0d4365
  Frederic Riss authored Aug 05, 2015
  ae0d4365
- Fix Windows test failure with triple instead of using the native OS · 10cac7a1
  Reid Kleckner authored Aug 05, 2015
  10cac7a1
- If the "CodeView" module flag is set, emit codeview instead of DWARF · 12d2c120
  Reid Kleckner authored Aug 05, 2015
  12d2c120
- MIR Serialization: Serialize the machine operand's offset. · 5672a893
  Alex Lorenz authored Aug 05, 2015
  5672a893
- Divide the primitive size in bits by eight so the initial load's alignment is in · 559c1d72
  Richard Diamond authored Aug 05, 2015
  559c1d72
Aug 05, 2015
- [LoopUnswitch] Preserve make.implicit metadata for unswitched conditions · 50efd922
  Chen Li authored Aug 05, 2015
  50efd922
- x86 atomic: optimize a.store(reg op a.load(acquire), release) · 86620837
  JF Bastien authored Aug 05, 2015
  86620837
- Revert "Fix MO's analyzePhysReg, it was confusing sub- and super-registers.... · 7c4218f4
  JF Bastien authored Aug 05, 2015
  7c4218f4
- Fix MO's analyzePhysReg, it was confusing sub- and super-registers. Problem... · ce5256f5
  JF Bastien authored Aug 05, 2015
  ce5256f5
- MIR Parser: Report an error when parsing large immediate operands. · 3f2058da
  Alex Lorenz authored Aug 05, 2015
  3f2058da
- MIR Serialization: Serialize the typed immediate integer machine operands. · 05e3882e
  Alex Lorenz authored Aug 05, 2015
  05e3882e
- [dsymutil] Fix test patterns. · 6e327863
  Frederic Riss authored Aug 05, 2015
  6e327863
- [dsymutil] Implement support for handling mach-o universal binaries as main input/output. · 4dd3e0c4
  Frederic Riss authored Aug 05, 2015
  4dd3e0c4
- MIR Parser: Report an error when parsing duplicate register flags. · 2b3cf193
  Alex Lorenz authored Aug 05, 2015
  2b3cf193
- [GMR] Teach the conservative path of GMR to catch even more easy cases. · 405e4f90
  Chandler Carruth authored Aug 05, 2015
  405e4f90
- MIR Serialization: Serialize the 'early-clobber' register operand flag. · 01c1a5ee
  Alex Lorenz authored Aug 05, 2015
  01c1a5ee
- MIR Serialization: Serialize the 'debug-use' register operand flag. · 9075258b
  Alex Lorenz authored Aug 05, 2015
  9075258b
- [Sparc] Fix disassembly of popc instruction. · bce20afe
  James Y Knight authored Aug 05, 2015
  bce20afe
- Force the MachO generated for Darwin to have VERSION_MIN load command · 9927206f
  Steven Wu authored Aug 05, 2015
  9927206f
- ARMISelDAGToDAG.cpp had this self-contradictory code: · 6fbef2a7
  Artyom Skrobov authored Aug 05, 2015
  6fbef2a7
- [InstCombine] Added more specific SSE2/AVX2 vector shift tests. · 42c611b9
  Simon Pilgrim authored Aug 05, 2015
  42c611b9
- [MachineCombiner] Don't use the opcode-only form of computeInstrLatency · 17caf326
  Hal Finkel authored Aug 05, 2015
  17caf326
Aug 04, 2015
- [RuntimeDyld] Adapt PPC64 relocations to PPC32 · 23cdeeea
  Hal Finkel authored Aug 04, 2015
  23cdeeea
- [x86] machine combiner reassociation: mark EFLAGS operand as 'dead' · 75ced278
  Sanjay Patel authored Aug 04, 2015
  75ced278
- Revert r229675 - [mips] Avoid redundant sign extension of the result of binary... · 044e1722
  Vasileios Kalintiris authored Aug 04, 2015
  044e1722
- [InstCombine] Split off SSE2/AVX2 vector shift tests. · d19b9d82
  Simon Pilgrim authored Aug 04, 2015
  d19b9d82
- Linker: Fix references to uniqued nodes after r243883 · 706f37e8
  Duncan P. N. Exon Smith authored Aug 04, 2015
  706f37e8
- Update test suite to make "ninja check" succeed without native backend builtin · c8d57831
  Mehdi Amini authored Aug 04, 2015
  c8d57831
- Move generic MIR tests in their own subdir, requires "native" as well · 63c3989f
  Mehdi Amini authored Aug 04, 2015
  63c3989f
- Improve lit "native" feature to check if the native backend is builtin · fc6b6983
  Mehdi Amini authored Aug 04, 2015
  fc6b6983
- ARM: support windows division routines · 0a2672bb
  Saleem Abdulrasool authored Aug 04, 2015
  0a2672bb
- Revert "[LSR] Generate and use zero extends" · 215df9ed
  Sanjoy Das authored Aug 04, 2015
  215df9ed