Commits · ddc2f1e3fb4f8f9ae7dd130e40b60cfc775eba24 · Roger Ferrer / llvm-epi · GitLab

Feb 03, 2021
- [DWARF] Location-less inlined variables should not have DW_TAG_variable · ddc2f1e3
  Jeremy Morse authored Feb 03, 2021
  ddc2f1e3
- [ConstraintElimination] Add some tests with conds in loop header. · be0bf04b
  Florian Hahn authored Feb 03, 2021
  be0bf04b
- Revert "[ConstantFold] Fold more operations to poison" · 06829034
  Juneyoung Lee authored Feb 04, 2021
  06829034
- [test] Use host platform specific error message substitution in lit tests - continued · e59d336e
  Abhina Sreeskantharajan authored Feb 03, 2021
  e59d336e
- AMDGPU: Move handling of allocation of fixed ABI inputs · 9719f170
  Matt Arsenault authored Jan 09, 2021
  9719f170
- [LoopVectorize] add test for fake min/max; NFC · 916c4121
  Sanjay Patel authored Feb 03, 2021
  916c4121
- [X86][SSE] Support variable-index float/double vector insertion on SSE41+ targets (PR47924) · 32b7c2fa
  Simon Pilgrim authored Feb 03, 2021
  32b7c2fa
- Revert "[AMDGPU] Add a new Clamp Pattern to the GlobalISel Path." · d49efdc9
  Sebastian Neubauer authored Feb 03, 2021
  d49efdc9
- [AArch64][SVE]Add cost model for broadcast shuffle · 2cbcf3e2
  Caroline Concatto authored Jan 28, 2021
  2cbcf3e2
- [InstrProfiling] Use !associated metadata for counters, data and values · 97ba5cde
  Petr Hosek authored Jul 13, 2019
  97ba5cde
- [RISCV] Load/store vector mask types. · 63baeec6
  Hsiangkai Wang authored Dec 16, 2020
  63baeec6
- [RISCV] Add new vector instructions in v0.10. · c7189ba7
  Hsiangkai Wang authored Feb 01, 2021
  c7189ba7
- [Statepoint] Handle 'undef' operand tied to def · de305b04
  Serguei Katkov authored Feb 02, 2021
  de305b04
- [yaml2obj][wasm] Support numeric relocation type · fb7c3663
  Fangrui Song authored Feb 02, 2021
  fb7c3663
- AMDGPU: Fix adding extra operands for i128 asm constraints · af2cbe8e
  Matt Arsenault authored Feb 02, 2021
  af2cbe8e
- AMDGPU: Don't consider global pressure when bundling soft clauses · 1e377a27
  Matt Arsenault authored Jan 30, 2021
  1e377a27
- [GlobalISel] Check if branches use the same MBB in matchOptBrCondByInvertingCond · 02d4b365
  Jessica Paquette authored Feb 02, 2021
  02d4b365
- [FileCheck] Make --allow-unused-prefixes cl::ZeroOrMore · eec87db2
  Fangrui Song authored Feb 02, 2021
  eec87db2
- [test][NewPM] Pin various tests to the legacy PM · dd4dbad8
  Arthur Eubanks authored Feb 02, 2021
  dd4dbad8
Feb 02, 2021
- [AArch64] Homogeneous Prolog and Epilog Size Optimization · 4f58b1bd
  Kyungwoo Lee authored Feb 01, 2021
  4f58b1bd
- [ConstraintElimination] Skip pointer casts. · d8e90716
  Florian Hahn authored Feb 02, 2021
  d8e90716
- [CSSPGO] Introducing distribution factor for pseudo probe. · 3d89b3cb
  Hongtao Yu authored Dec 11, 2020
  3d89b3cb
- [RISCV] Fix incorrect RVV sdiv/udiv lowering · b4106f9c
  Fraser Cormack authored Feb 02, 2021
  b4106f9c
- [MC] Upgrade DWARF version to 5 upon .file 0 · 3e8ab54b
  Fangrui Song authored Feb 02, 2021
  3e8ab54b
- [ConstraintElimination] Add test with pointer bitcast. · abc14518
  Florian Hahn authored Feb 02, 2021
  
  abc14518
- [MC] Support SHF_GNU_RETAIN as section flag 'R' · 1477ed84
  Fangrui Song authored Feb 02, 2021
  1477ed84
- [yaml2obj/obj2yaml/llvm-readobj] Support SHF_GNU_RETAIN · 1560a000
  Fangrui Song authored Feb 02, 2021
  1560a000
- [ExpandReductions] add test for fmin with FMF; NFC · ce33bd0b
  Sanjay Patel authored Feb 02, 2021
  
  ce33bd0b
- [InlineFunction] Only update noalias scopes once for an instruction. · 50c523a9
  Jeroen Dobbelaere authored Feb 02, 2021
  50c523a9
- [ARM] Mark MVE_VMOV_to_lane_32 as isInsertSubregLike · 2753722b
  David Green authored Feb 02, 2021
  2753722b
- [AMDGPU] Remove unused tmp register · 8b898b19
  Sebastian Neubauer authored Feb 02, 2021
  8b898b19
- [AMDGPU] Save fp/bp after csr saves · 6b6ae583
  Sebastian Neubauer authored Feb 01, 2021
  6b6ae583
- [CSSPGO] Factor out common part for CSSPGO inline and AFDO inline · 1645f465
  Wenlei He authored Jan 19, 2021
  1645f465
- [PowerPC] Materialize 34 bit constants with pli on Power 10. · 288f762b
  Stefan Pintilie authored Feb 02, 2021
  288f762b
- [ARM] Add MVE insert-of-extract pattern · 3a5adf84
  David Green authored Feb 02, 2021
  3a5adf84
- [InstCombine] Host inversion out of ashr's value operand (PR48995) · 485c4b55
  Roman Lebedev authored Feb 02, 2021
  485c4b55
- [NFC][InstCombine] Add tests for (~x) a>> y --> ~(x a>> y) fold (PR48995) · e6a061ed
  Roman Lebedev authored Feb 02, 2021
  e6a061ed
- Revert "[InstrProfiling] Use !associated metadata for counters, data and values" · 4f1320b7
  Tom Weaver authored Feb 02, 2021
  4f1320b7
- [ARM] Extra shuffle tests. NFC · c4fe29e0
  David Green authored Feb 02, 2021
  
  c4fe29e0
- [ARM] Select VINS from vector inserts · c7225756
  David Green authored Feb 02, 2021
  c7225756