Commits · deb8f8bcf31540c657716ea5242183b0792702a1 · Roger Ferrer / llvm-epi · GitLab

Sep 17, 2020
- [SVE][CodeGen] Lower floating point -> integer conversions · f7185b27
  Kerry McLaughlin authored Sep 17, 2020
  f7185b27
- [AMDGPU] Remove orphan SITargetLowering::LowerINT_TO_FP declaration. NFCI. · 8adf92e2
  Simon Pilgrim authored Sep 16, 2020
  8adf92e2
- [X86] Fix stack alignment on 32-bit Solaris/x86 · a9cbe5cf
  Rainer Orth authored Sep 17, 2020
  a9cbe5cf
- [PowerPC] Fix store-fptoi combine of f128 on Power8 · ebfbdebe
  Qiu Chaofan authored Sep 17, 2020
  ebfbdebe
- [AArch64] Add -mmark-bti-property flag. · f70baaf7
  Daniel Kiss authored Sep 16, 2020
  f70baaf7
- Revert "[AArch64] Add -mmark-bti-property flag." · 60e244f8
  Daniel Kiss authored Sep 17, 2020
  60e244f8
- [AArch64] Add -mmark-bti-property flag. · 95e43f84
  Daniel Kiss authored Sep 16, 2020
  95e43f84
Sep 16, 2020
- [AMDGPU] gfx1030 RT support · 91f503c3
  Stanislav Mekhanoshin authored Sep 16, 2020
  91f503c3
- [AArch64][GlobalISel] Make G_BUILD_VECTOR os <16 x s8> legal. · 6ad33d83
  Amara Emerson authored Sep 16, 2020
  
  6ad33d83
- AMDGPU: Clear offset register when using local stack area · 36724895
  Matt Arsenault authored Sep 10, 2020
  36724895
- [ARM][MVE] Tail-predication: predicate new elementcount checks on force-enabled · b5c3efeb
  Sjoerd Meijer authored Sep 16, 2020
  b5c3efeb
- [AMDGPU] Remove obsolete comment · cb64455f
  Jay Foad authored Sep 16, 2020
  cb64455f
- [AMDGPU] Corrected directive to use for ELF weak refs · 06d058af
  Dmitry Preobrazhensky authored Sep 16, 2020
  06d058af
- [X86] EmitInstrWithCustomInserter - remove redundant getDebugLoc() calls. NFCI. · b2c931ef
  Simon Pilgrim authored Sep 16, 2020
  b2c931ef
- [NFC][Regalloc] accessors for 'reg' and 'weight' · 6e85c3d5
  Mircea Trofin authored Sep 15, 2020
  6e85c3d5
- AMDGPU: Improve <2 x i24> arguments and return value handling · 71131db6
  Matt Arsenault authored Aug 30, 2020
  71131db6
- [AMDGPU] Add v3f16/v3i16 support to SDag · 833b3b0d
  Sebastian Neubauer authored Jul 23, 2020
  833b3b0d
- [X86] Assert that we've found a terminator instruction. NFCI. · cd461512
  Simon Pilgrim authored Sep 16, 2020
  cd461512
- [AMDGPU] Enable scheduling around FP MODE-setting instructions · 90777e29
  Jay Foad authored Sep 09, 2020
  90777e29
- [X86][SSE] Move VZEXT_MOVL(INSERT_SUBVECTOR(UNDEF,X,0)) handling into combineTargetShuffle. · aa4b0b75
  Simon Pilgrim authored Sep 16, 2020
  aa4b0b75
- [ARM] Reorder some logic · 3ce9ec0c
  Sam Parker authored Sep 16, 2020
  3ce9ec0c
- [ARM] Fix tail predication predicate tracking · a63b2a46
  Sam Parker authored Sep 16, 2020
  a63b2a46
- [ARM] Add more validForTailPredication · 86172ce3
  Sam Parker authored Sep 16, 2020
  86172ce3
- [ARM][LowOverheadLoops] Combine a VCMP and VPST into a VPT · ef0b9f33
  Sam Tebbs authored Sep 14, 2020
  ef0b9f33
- [ARM][MachineOutliner] Add calls handling. · 070b9696
  Yvan Roux authored Sep 16, 2020
  070b9696
- [X86] Don't scalarize gather/scatters with non-power of 2 element counts. Widen instead. · 41f4cd60
  Craig Topper authored Sep 15, 2020
  41f4cd60
- [X86] Always use 16-bit displacement in 16-bit mode when there is no base or index register. · 2ce1a697
  Craig Topper authored Sep 15, 2020
  2ce1a697
- [Hexagon] Replace incorrect pattern for vpackl HWI32 -> HVi8 · 5f4abb7f
  Krzysztof Parzyszek authored Sep 15, 2020
  5f4abb7f
- [AArch64][GlobalISel] Refactor + improve CMN, ADDS, and ADD emit functions · ffe9986d
  Jessica Paquette authored Sep 10, 2020
  ffe9986d
- [AMDGPU] Unify intrinsic ret/nortn interface · 277de43d
  Stanislav Mekhanoshin authored Sep 10, 2020
  277de43d
Sep 15, 2020
- [AArch64][SVE] Add lowering for llvm fsqrt · d417488e
  Muhammad Asif Manzoor authored Sep 15, 2020
  d417488e
- [PowerPC] Implement __int128 vector divide operations · 05aa997d
  Albion Fung authored Sep 15, 2020
  05aa997d
- [X86] Use Align in... · 05134877
  Craig Topper authored Sep 15, 2020
  05134877
- [X86][AVX] lowerShuffleWithSHUFPS - handle missed canonicalization cases. · a43e68b5
  Simon Pilgrim authored Sep 15, 2020
  a43e68b5
- AMDGPUPrintfRuntimeBinding.cpp - drop unnecessary casts/dyn_casts. NFCI. · 97a23ab2
  Simon Pilgrim authored Sep 15, 2020
  97a23ab2
- [ARM][MVE] Tail-predication: use unsigned SCEV ranges for tripcount · 635b8751
  Sjoerd Meijer authored Sep 15, 2020
  635b8751
- [ARM] Corrected condition in isSaturatingConditional · 1119bf95
  Meera Nakrani authored Sep 15, 2020
  1119bf95
- [MVE] fix typo in llvm debug message. NFC. · b4b1b841
  Sjoerd Meijer authored Sep 15, 2020
  
  b4b1b841
- [X86] detectAVGPattern - accept non-pow2 vectors by padding. · fc446935
  Simon Pilgrim authored Sep 15, 2020
  fc446935
- [X86] Place new constant node in topological order in X86DAGToDAGISel::matchBitExtract · 46673763
  Craig Topper authored Sep 14, 2020
  46673763