Commits · e0900f285bb532790ed494df901f87c5c8b904da · Roger Ferrer / llvm-epi · GitLab

Sep 19, 2019
- [MCA] Improved cost computation for loop carried dependencies in the bottleneck analysis. · e0900f28
  Andrea Di Biagio authored Sep 19, 2019
  e0900f28
Sep 02, 2019
- [X86][BtVer2] Fix latency and throughput of conditional SIMD store instructions. · 528f6814
  Andrea Di Biagio authored Sep 02, 2019
  528f6814
Aug 23, 2019
- [X86][BtVer2] Add a read-advance to every implicit register use of CMPXCHG8B/16B. · 8e9af64d
  Andrea Di Biagio authored Aug 23, 2019
  8e9af64d
- [X86][BtVer2] Fix latency of ALU RMW instructions. · 1630f64e
  Andrea Di Biagio authored Aug 23, 2019
  1630f64e
Aug 22, 2019
- [X86][BtVer2] Fix latency/throughput of scalar integer MUL instructions. · c9649eb9
  Andrea Di Biagio authored Aug 22, 2019
  c9649eb9
- [X86][BtVer2] Fix latency and throughput of XCHG and XADD. · c6744055
  Andrea Di Biagio authored Aug 22, 2019
  c6744055
Aug 20, 2019
- [X86][BtVer2] Use ReadAfterLd entries for the register operands of CMPXCHG. · 2e897a94
  Andrea Di Biagio authored Aug 20, 2019
  2e897a94
- [X86][BtVer2] Fix latency and throughput of atomic INC/DEC/NEG/NOT. · 16111d37
  Andrea Di Biagio authored Aug 20, 2019
  16111d37
- [MCA][X86] Add tests for LOCK variants of standard X86 arithmetic ops · 6a3dc3e1
  Simon Pilgrim authored Aug 20, 2019
  6a3dc3e1
- [X86][Btver2] Fix latency and throughput of CMPXCHG instructions. · b1bdd97a
  Andrea Di Biagio authored Aug 20, 2019
  b1bdd97a
Aug 19, 2019
- [X86] Move scheduling tests for CMPXCHG to the corresponding resources-x86_64.s files. NFC · bf989187
  Andrea Di Biagio authored Aug 19, 2019
  bf989187
- [X86] Added extensive scheduling model tests for all the CMPXCHG variants. NFC · ecbaba67
  Andrea Di Biagio authored Aug 19, 2019
  ecbaba67
Aug 09, 2019
- [MCA] Add flag -show-encoding to llvm-mca. · cbec9af6
  Andrea Di Biagio authored Aug 09, 2019
  cbec9af6
Aug 07, 2019
- [X86] Limit vpermil2pd/vpermil2ps immediates to 4 bits in the assembly parser. · 29688f4d
  Craig Topper authored Aug 07, 2019
  29688f4d
Aug 02, 2019
- [MCA] Add support for printing immedate values as hex. Also enable lexing of... · 207e3af5
  Andrea Di Biagio authored Aug 02, 2019
  207e3af5
Jun 21, 2019
- Set an explicit x86 triple for test bottleneck-analysis.s added by my r364045. NFC · dd0dc19b
  Andrea Di Biagio authored Jun 21, 2019
  dd0dc19b
- [MCA][Bottleneck Analysis] Teach how to compute a critical sequence of... · aa9b6468
  Andrea Di Biagio authored Jun 21, 2019
  aa9b6468
Jun 19, 2019
- Fix r363773: Update Barcelona MCA tests. · f7a6fb9f
  Clement Courbet authored Jun 19, 2019
  f7a6fb9f
- [NFC][X86][MCA] Barcelona: add load/store/load-store-throughput tests · 9f9691c0
  Roman Lebedev authored Jun 19, 2019
  9f9691c0
- [NFC][X86][MCA] BdVer2: add load-store-throughput test · 4358016b
  Roman Lebedev authored Jun 19, 2019
  4358016b
- [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsr · 4ef7c286
  Clement Courbet authored Jun 19, 2019
  4ef7c286
Jun 17, 2019
- [lit] Delete empty lines at the end of lit.local.cfg NFC · ac14f7b1
  Fangrui Song authored Jun 17, 2019
  ac14f7b1
Jun 15, 2019
- [NFC][MCA][X86] Add one more 'clear super register' pattern - movss/movsd load clears high XMM bits · 5dd61974
  Roman Lebedev authored Jun 15, 2019
  5dd61974
- [NFC][MCA][X86] Add baseline test coverage for AMD Barcelona (aka K10, fam10h) · 680c43b7
  Roman Lebedev authored Jun 15, 2019
  680c43b7
Jun 10, 2019
- [llvm-mca] Enable bottleneck analysis when flag -all-views is specified. · c650a908
  Andrea Di Biagio authored Jun 10, 2019
  c650a908
May 26, 2019
- [MCA][Scheduler] Improved critical memory dependency computation. · c2493ce4
  Andrea Di Biagio authored May 26, 2019
  c2493ce4
May 25, 2019
- [X86] Add zero idioms to the haswell, broadwell, and skylake schedule models.... · 4b08fcde
  Craig Topper authored May 25, 2019
  4b08fcde
- [X86][llvm-mca] Add zero idiom tests for Intel CPUs. NFC · af6c9df1
  Craig Topper authored May 25, 2019
  af6c9df1
May 09, 2019
- [MCA] Add support for nested and overlapping region markers · 4e62554b
  Andrea Di Biagio authored May 09, 2019
  4e62554b
- [X86] AMD Piledriver (BdVer2): major cleanup (mainly inverse throughput) · 9db0e725
  Roman Lebedev authored May 09, 2019
  9db0e725
May 08, 2019
- [MCA] Don't add a name to the default code region. · d52a542e
  Andrea Di Biagio authored May 08, 2019
  d52a542e
May 06, 2019
- [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing. · d10a200c
  Craig Topper authored May 06, 2019
  d10a200c
Apr 29, 2019
- [llvm-mca][x86] Fix MMX PMOVMSKB test · 9d99372f
  Simon Pilgrim authored Apr 29, 2019
  9d99372f
Apr 28, 2019
- [MCA] Fix typo in AVX2 gather tests. NFC · 43003f0f
  Andrea Di Biagio authored Apr 28, 2019
  43003f0f
Apr 11, 2019
- [MCA] Remove wrong comments from a test. NFC · 2050dff9
  Andrea Di Biagio authored Apr 11, 2019
  2050dff9
Apr 10, 2019
- [X86] Make _Int instructions the preferred instructon for the assembly parser... · 4a32ce39
  Craig Topper authored Apr 10, 2019
  4a32ce39
Apr 08, 2019
- [llvm-mca][scheduler-stats] Print issued micro opcodes per cycle. NFCI · f6a60f1f
  Andrea Di Biagio authored Apr 08, 2019
  f6a60f1f
Mar 29, 2019
- [MCA] Add an experimental MicroOpQueue stage. · e074ac60
  Andrea Di Biagio authored Mar 29, 2019
  e074ac60
Mar 28, 2019
- [X86] AMD Piledriver (BdVer2): fine-tune some latencies · c325be6c
  Roman Lebedev authored Mar 28, 2019
  c325be6c
Mar 18, 2019
- [X86] Remove the _alt forms of (V)CMP instructions. Use a combination of... · c2b35ebc
  Craig Topper authored Mar 18, 2019
  c2b35ebc