Commits · e19cb9c57fea7981c206fcbaf9807870de6001a0 · Roger Ferrer / llvm-epi · GitLab

Nov 13, 2022
- [X86] Cleanup CVTPD2PS schedule values · e19cb9c5
  Simon Pilgrim authored Nov 13, 2022
  e19cb9c5
- Revert "[InstCombine] allow more folds more multi-use selects" · f6f1fd44
  Michał Górny authored Nov 13, 2022
  f6f1fd44
- [AArch64] Optimize more memcmp when the result is tested for [in]equality with 0 · 894f9e54
  zhongyunde authored Nov 13, 2022
  894f9e54
Nov 12, 2022
- AMDGPU: Add some tests for i1 sitofp/uitofp-like selects · 0a376d10
  Matt Arsenault authored Nov 12, 2022
  
  0a376d10
- AMDGPU: Switch some tests to generated checks · 5247ae9d
  Matt Arsenault authored Nov 12, 2022
  
  5247ae9d
- [X86] IceLakeModel - conversion instructions don't use Port015 · 4a28b7ba
  Simon Pilgrim authored Nov 12, 2022
  4a28b7ba
- [MCA][X86] Add test coverage for VNNI instructions · cd3cced8
  Simon Pilgrim authored Nov 12, 2022
  
  cd3cced8
- [MCA][X86] Add missing AVX-GFNI YMM test coverage · 0c64d465
  Simon Pilgrim authored Nov 12, 2022
  
  0c64d465
- [X86] Always classify gf2p8affineqb/gf2p8affineinvqb instructions with SchedWriteVecIMul · 9ec1c839
  Simon Pilgrim authored Nov 12, 2022
  9ec1c839
- [MCA][X86] Add test coverage for GFNI instructions · cbe5b2dd
  Simon Pilgrim authored Nov 12, 2022
  
  cbe5b2dd
- [Hexagon] Improve idioms for fixed-point vector multiplication · a03e16a1
  Krzysztof Parzyszek authored Sep 28, 2022
  a03e16a1
- [AArch64] Allow sinking both extract and splat to smull · e6434113
  David Green authored Nov 12, 2022
  e6434113
- [X86] Replace unnecessary SKL CVTSI2SS/CVTSI2SD overrides with better base class defs · fca63649
  Simon Pilgrim authored Nov 12, 2022
  fca63649
- [MCA][X86][AVX512] Add test coverage for unsigned<->fp conversion instructions · 2be46b33
  Simon Pilgrim authored Nov 12, 2022
  
  2be46b33
- [X86] SkylakeServerModel - conversion instructions don't use Port015 · 07c8f3dd
  Simon Pilgrim authored Nov 12, 2022
  07c8f3dd
- [X86] Replace unnecessary SKL CVTPD2DQ overrides with better base class defs · b31a5d72
  Simon Pilgrim authored Nov 12, 2022
  b31a5d72
- [LoongArch] Implement MCTargetExpr::fixELFSymbolsInTLSFixups hook · 39b1fec1
  wanglei authored Nov 12, 2022
  39b1fec1
- [AArch64][GlobalISel] Select TBZ for icmp sge x, 0. · 2179f513
  Amara Emerson authored Nov 11, 2022
  2179f513
- AMDGPU: Fold llvm.amdgcn.sqrt(undef) · a58541f1
  Matt Arsenault authored Jun 25, 2020
  
  a58541f1
- Revert "[Hexagon] Use default attributes for intrinsics" · 57dbca20
  Alina Sbirlea authored Nov 11, 2022
  57dbca20
Nov 11, 2022
- llvm-diff: Add failing testcase for issue 58629 · 7c0362b1
  Matt Arsenault authored Oct 23, 2022
  
  7c0362b1
- [AArch64] Select BFI/BFXIL to ORR with shifted operand when one operand is the... · 0f9ef8b1
  Mingming Liu authored Nov 08, 2022
  0f9ef8b1
- [NFC][AArch64]Precommit test cases to show ORR is better when one operand is a... · 3acbaddd
  Mingming Liu authored Nov 08, 2022
  3acbaddd
- [LoopFuse] Ensure inner loops are in loop simplified form under new PM · ec210f39
  Mengxuan Cai authored Nov 11, 2022
  ec210f39
- [InstCombine] allow more folds more multi-use selects · 681a6a39
  Sanjay Patel authored Nov 11, 2022
  681a6a39
- [InstCombine] add tests for binop with select operand; NFC · 095f7bd5
  Sanjay Patel authored Nov 11, 2022
  
  095f7bd5
- [objcopy] Fix order of Mach-O LINKEDIT pieces during layout · dd2165ef
  Daniel Rodríguez Troitiño authored Nov 11, 2022
  dd2165ef
- [Hexagon] Place aligned loads closer to users · 01718629
  Krzysztof Parzyszek authored Nov 08, 2022
  01718629
- [ObjectYAML] Basic support for chained fixups. · cf15d23e
  Daniel Rodríguez Troitiño authored Nov 11, 2022
  cf15d23e
- AMDGPU: Disable some class simplifications for strictfp · 3e4280c0
  Matt Arsenault authored Nov 11, 2022
  
  3e4280c0
- Precommit for redundant and after SVE load · bd27ac42
  Benjamin Maxwell authored Nov 08, 2022
  
  bd27ac42
- [InstSimplify] add test for fsub with inf operand; NFC · c2c48f0c
  Sanjay Patel authored Nov 11, 2022
  c2c48f0c
- [MemCpyOpt] Avoid moving lifetime marker above def (PR58903) · 4d33cf41
  Nikita Popov authored Nov 11, 2022
  4d33cf41
- [InstSimplify] fold fsub nnan with Inf operand · 21f1b2da
  Sanjay Patel authored Nov 10, 2022
  21f1b2da
- [LoongArch] Generate PCALAU12I + JIRL instruction pair for medium codemodel · 882ddab4
  wanglei authored Nov 11, 2022
  882ddab4
- [AMDGPU][MC] Disable SGPRs as src operands of VOP3 VINTRP instructions · 05baf681
  Dmitry Preobrazhensky authored Nov 11, 2022
  05baf681
- [LoongArch] Moved expansion of PseudoCALL to LoongArchPreRAExpandPseudo pass · 4edcf8ab
  wanglei authored Nov 11, 2022
  4edcf8ab
- [Hexagon] Use default attributes for intrinsics · 8a8983b2
  Nikita Popov authored Nov 08, 2022
  8a8983b2
- [Test] Add test for crash in IRCE when IV is AddRec for another loop · b1e9c433
  Dmitry Makogon authored Nov 11, 2022
  b1e9c433
- [AArch64] Add smull sinking extract-and-splat tests and regenerate neon-vmull-high-p8.ll. NFC · a1e79928
  David Green authored Nov 11, 2022
  
  a1e79928