Commits · e243ead6fc0af016bb8863fff3687a52afc20e61 · Roger Ferrer / llvm-epi · GitLab

Jun 07, 2022
- Reland [AMDGPU] gfx11 vop3dpp instructions · e243ead6
  Joe Nash authored May 18, 2022
  e243ead6
- [ValueTracking] Add support to deduce a PHI node being a power of 2 if each... · ba26e45c
  William Huang authored Jun 07, 2022
  ba26e45c
- [AArch64] Remove isDef32 · bccbf527
  David Green authored Jun 07, 2022
  bccbf527
- [InstCombine] reduce right-shift-of-left-shifted constant via demanded bits · 82040d41
  Sanjay Patel authored Jun 07, 2022
  82040d41
- [InstCombine] add vector tests for shift-shift; NFC · 8956f80e
  Sanjay Patel authored Jun 07, 2022
  8956f80e
- [llvm-ml] Remove all file extension restrictions · ae38e488
  Alan Zhao authored Jun 02, 2022
  ae38e488
- Add initial coverage for invalid instruction costs in LoopRotate · d20f3fb6
  Philip Reames authored Jun 07, 2022
  d20f3fb6
- [DAG] combineShuffleOfSplatVal - fold shuffle(splat,undef) -> splat, iff the... · a083f3ca
  Simon Pilgrim authored Jun 07, 2022
  a083f3ca
- [LoopFlatten] Fix crash if the inner loop trip count comes from a sext instruction. · d73684e2
  Craig Topper authored Jun 07, 2022
  d73684e2
- [RISCV] Scalarize gather/scatter on RV64 with Zve32* extension. · 0c66deb4
  Craig Topper authored Jun 07, 2022
  0c66deb4
- [SLP]Add a test for geps with non-const indeces in scatter vectorize · 3731bbc4
  Alexey Bataev authored Jun 07, 2022
  3731bbc4
- llvm-reduce: Add -abort-on-invalid-reduction to MIR tests · 59328ab0
  Matt Arsenault authored Jun 06, 2022
  59328ab0
- llvm-reduce: Don't set generic instruction operands to undef · cbbc7e4a
  Matt Arsenault authored Jun 06, 2022
  cbbc7e4a
- llvm-reduce: Add pass to remove register uses · 47c8ec81
  Matt Arsenault authored Apr 22, 2022
  47c8ec81
- [AMDGPU] Add support for the .reloc directive · 81edc831
  Jay Foad authored Jun 06, 2022
  81edc831
- llvm-reduce: Add cloning of target MachineFunctionInfo · cc5a1b3d
  Matt Arsenault authored Apr 15, 2022
  cc5a1b3d
- llvm-reduce: Fix crashes on unreachable blocks for MIR instructions · e6723d80
  Matt Arsenault authored Jun 04, 2022
  
  e6723d80
- llvm-reduce: Don't assert on functions which don't track liveness · 56303223
  Matt Arsenault authored Apr 13, 2022
  56303223
- AMDGPU: Fix not checking liveness in test · 22cc4975
  Matt Arsenault authored Jun 06, 2022
  
  22cc4975
- [X86] getFauxShuffleMask - add VSELECT/BLENDV handling · f5507978
  Simon Pilgrim authored Jun 07, 2022
  f5507978
- [X86] x86-interleaved-access.ll - use nounwind to remove cfi noise from tests · 61984f91
  Simon Pilgrim authored Jun 07, 2022
  
  61984f91
- [ARM] Fix MVE getShuffleCost legalized type check · 53be6ab2
  David Green authored Jun 07, 2022
  53be6ab2
- [AArch64] Regenerate arm64-shifted-sext.ll and add a test from #55833. NFC · 6468feae
  David Green authored Jun 07, 2022
  
  6468feae
- [NFC][InstCombine] Add two more tests to select-binop-foldable-floating-point.ll · bc920450
  David Sherwood authored Jun 07, 2022
  bc920450
- [LoopVectorize] Add FastMathFlags to the select used for reductions with tail-folding · 997ecb00
  David Sherwood authored Jun 01, 2022
  997ecb00
- [SCCP] Don't mark ranges from branch conditions as potentially undef · 7fa97b47
  Nikita Popov authored May 30, 2022
  7fa97b47
- [DAGCombiner] Remove overzealous assertion when folding assert+trunc+assert (PR55846) · 5a64bc20
  Nikita Popov authored Jun 03, 2022
  5a64bc20
- [MC][ARM] Reuse symbol value in constant pool · a7b154aa
  luxufan authored Jun 06, 2022
  a7b154aa
- [ASan] Skip any instruction inserted by another instrumentation. · e52a38c8
  Enna1 authored Jun 07, 2022
  e52a38c8
- [NFC] Fix spelling error M->L · 157f1f25
  Chris Bieneman authored Jun 06, 2022
  157f1f25
- [Object][Archive] Support a new archive member /<ECSYMBOLS>/ · c1d3cfea
  Pengxuan Zheng authored Jun 04, 2022
  c1d3cfea
- [DX][ObjYAML] Support for parsing DXIL part · 21c94523
  Chris Bieneman authored May 19, 2022
  21c94523
- Fix typo in wasm objcopy's only-keep-debug.test · e07dab8a
  Derek Schuff authored Jun 06, 2022
  e07dab8a
Jun 06, 2022
- Revert "[AMDGPU] gfx11 vop3dpp instructions" · eaed07eb
  Joe Nash authored Jun 06, 2022
  eaed07eb
- Revert "[AMDGPU] gfx11 VOP1+VOP2 Instruction MC support" · f617f89e
  Joe Nash authored Jun 06, 2022
  f617f89e
- [RISCV] Add cost model test coverage of scalable reductions · beb06f3c
  Philip Reames authored Jun 06, 2022
  
  beb06f3c
- [Objcopy][Wasm] Allow selecting known sections by name · c9dd1cc6
  Derek Schuff authored Jun 06, 2022
  c9dd1cc6
- [ARM] [MinGW] Default to WinEH exception handling instead of Dwarf · 98dc3e86
  Martin Storsjö authored May 13, 2022
  98dc3e86
- [DirectX] Embed DXIL in LLVM Module · d401a993
  Chris Bieneman authored May 10, 2022
  d401a993
- [NFC] Change lit test for print-changed=dot-cfg to use regular expression · 41778e3d
  Jamie Schmeiser authored Jun 06, 2022
  41778e3d