Commits · e4fc8c3de8f38eab1feae5ec34e9bc573153d370 · Roger Ferrer / llvm-epi · GitLab

May 26, 2021
- [RISCV][NFC] Fix some whitespace nits in MC test RUN lines · e4fc8c3d
  Jessica Clarke authored May 26, 2021
  
  e4fc8c3d
- [CostModel][AArch64] Add floating point arithmetic tests. NFC. · 6c92215e
  Sjoerd Meijer authored May 26, 2021
  
  6c92215e
- [DebugInstrRef][1/3] Track PHI values through register allocation · 8496fc2e
  Jeremy Morse authored May 26, 2021
  8496fc2e
- [NFC][Codegen][X86] Add a few more interleaved load/store patterns w/ i16 element type · ab7f26dc
  Roman Lebedev authored May 26, 2021
  ab7f26dc
- [NFC][X86][Costmodel] Add some more interleaved load/store test with i16 element type · 78c9796f
  Roman Lebedev authored May 26, 2021
  78c9796f
- [SCEV] Compute trip multiple for multiple exit loops · ff08c346
  Philip Reames authored May 26, 2021
  ff08c346
- [WebAssembly] Add TargetInstrInfo::getCalleeOperand · 5dd86aad
  Heejin Ahn authored May 21, 2021
  5dd86aad
- [SimplifyCFG] Use make_early_inc_range() while deleting instructions · 5bfe06ad
  Heejin Ahn authored May 26, 2021
  5bfe06ad
- [AMDGPU] Fix kernel LDS lowering for constants · 5e2facb9
  Stanislav Mekhanoshin authored May 26, 2021
  5e2facb9
- [AMDGPU][MC][GFX90A] Corrected DS_GWS opcodes · 13c6568c
  Dmitry Preobrazhensky authored May 26, 2021
  13c6568c
- [llvm-mc] Add -M to replace -riscv-no-aliases and -riscv-arch-reg-names · 73a11795
  Fangrui Song authored May 26, 2021
  73a11795
- [RISCV] Optimize SEW=64 shifts by splat on RV32. · 9065118b
  Craig Topper authored May 26, 2021
  9065118b
- [RISCV] Remove --riscv-no-aliases from RVV tests · d63d662d
  Jessica Clarke authored May 26, 2021
  d63d662d
- [RISCV] Don't propagate VL/VTYPE across inline assembly in the Insert VSETVLI pass. · b2c7ac87
  Craig Topper authored May 26, 2021
  b2c7ac87
- [SLP]Fix vectorization of insertelements with multiple uses. · 27d3528a
  Alexey Bataev authored May 26, 2021
  27d3528a
- [DebugInfo] Limit the number of values that may be referenced by a dbg.value · a0bd6105
  Stephen Tozer authored May 26, 2021
  a0bd6105
- [RISCV] Enable cross basic block aware vsetvli insertion · 1b47a3de
  Craig Topper authored May 25, 2021
  1b47a3de
- [unroll] Use value domain for symbolic execution based cost model · 9cc2181e
  Philip Reames authored May 26, 2021
  9cc2181e
- [SystemZ] Support i128 inline asm operands. · d058262b
  Jonas Paulsson authored Apr 19, 2021
  d058262b
- [MCA] Add a test for PR50483. NFC · 5f500d73
  Andrea Di Biagio authored May 26, 2021
  
  5f500d73
- [AMDGPU] Fix function pointer argument bug in AMDGPU Propagate Attributes pass. · fcd32d62
  jweightma authored May 26, 2021
  fcd32d62
- [X86][AMX] Fix a bug on tile config. · 4ed2b6cc
  Luo, Yuanke authored May 26, 2021
  4ed2b6cc
- [CostModel][AArch64] Add tests for bitreverse. NFC. · b6f6501b
  Sjoerd Meijer authored May 26, 2021
  
  b6f6501b
- [ARM] Extra test for reverted WLS memset. NFC · a409fcdd
  David Green authored May 26, 2021
  
  a409fcdd
- [X86][SSE] Regenerate some tests to expose the rip relative vector/broadcast loads · 629e2b34
  Simon Pilgrim authored May 26, 2021
  
  629e2b34
- [MCA][InOrderIssueStage] Fix LastWriteBackCycle computation. · 63cc9fd5
  Andrea Di Biagio authored May 26, 2021
  63cc9fd5
- [SLP][NFC]Add a test for multiple uses of insertelement instruction, · 8be23ed3
  Alexey Bataev authored May 26, 2021
  8be23ed3
- [LoopVectorize] Enable strict reductions when allowReordering() returns false · 9f76a852
  Kerry McLaughlin authored May 26, 2021
  9f76a852
- Return "[LoopDeletion] Break backedge if we can prove that the loop is exited... · be1a2320
  Max Kazantsev authored May 26, 2021
  be1a2320
- [InstCombine] add fmul tests with shared operand; NFC · 01120fe5
  Sanjay Patel authored May 26, 2021
  01120fe5
- [InstCombine] avoid 'tmp' usage in test files; NFC · 9e43b1e9
  Sanjay Patel authored May 26, 2021
  9e43b1e9
- [InstCombine] avoid 'tmp' usage in test file; NFC · b70fe92f
  Sanjay Patel authored May 26, 2021
  b70fe92f
- Revert "Return "[LoopDeletion] Break backedge if we can prove that the loop is... · 0de553dc
  Max Kazantsev authored May 26, 2021
  0de553dc
- Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration" · 43d2e51c
  Max Kazantsev authored May 26, 2021
  43d2e51c
- [AArch64] Generate LD1 for anyext i8 or i16 vector load · 8ac66d61
  Andrew Savonichev authored May 05, 2021
  8ac66d61
- [Test] Add Loop Deletion test with irreducible CFG · 5fb58d45
  Max Kazantsev authored May 26, 2021
  5fb58d45
- [MC] Move elf-unique-sections-by-flags.ll to X86/ · ab8c4411
  Tomas Matheson authored May 26, 2021
  
  ab8c4411
- [MC][ELF] Emit unique sections for different flags · 165321b3
  Tomas Matheson authored May 12, 2021
  165321b3
- [X86][SLM] Fix vector PSHUFB + variable shift resource/throughputs · 21aec4fd
  Simon Pilgrim authored May 26, 2021
  21aec4fd
- [SCEV] Add tests with signed predicates for applyLoopGuards. · 2a41d702
  Florian Hahn authored May 25, 2021
  
  2a41d702