Commits · e5ed5e2cba20d395c9028a562a4f5a4dfc019c42 · Roger Ferrer / llvm-epi · GitLab

Apr 09, 2018
- [X86][MMX] Fix missing itinerary for PALIGNR · e5ed5e2c
  Simon Pilgrim authored Apr 09, 2018
  e5ed5e2c
- [X86][MMX] Fix missing itinerary for MOVQ2DQ instruction format · 140fee07
  Simon Pilgrim authored Apr 09, 2018
  140fee07
- [X86][MMX] Fix missing itinerary for CVTPI2PS · abf36113
  Simon Pilgrim authored Apr 09, 2018
  abf36113
- [X86][MMX] Fix flipped reg/mem typo in MMX_MISC_FUNC_ITINS · 0047efdd
  Simon Pilgrim authored Apr 09, 2018
  0047efdd
- [X86][SSE] Fix f32 mul/div itinerary groups typo · 61312865
  Simon Pilgrim authored Apr 09, 2018
  61312865
Apr 08, 2018
- [TargetSchedule] shrink interface for init(); NFCI · 0d7df36c
  Sanjay Patel authored Apr 08, 2018
  0d7df36c
- [X86] Add SchedWrites for CMOV and SETCC. Use them to remove InstRWs. · b7baa358
  Craig Topper authored Apr 08, 2018
  b7baa358
- [X86][Znver1] Remove InstRWs for BLENDVPS/PD · c362f42b
  Craig Topper authored Apr 08, 2018
  c362f42b
- [X86] Change std::sort to llvm::sort in response to r327219 · 68a151a1
  Mandeep Singh Grang authored Apr 08, 2018
  68a151a1
- [X86][Btver2] Add vector extract costs · 86588fc8
  Simon Pilgrim authored Apr 08, 2018
  86588fc8
Apr 07, 2018
- [X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of lowering. · ef37aebc
  Craig Topper authored Apr 07, 2018
  ef37aebc
- [CostModel][X86] Fix v32i16/v64i8 SETCC costs on AVX512BW targets · 80ce1dde
  Simon Pilgrim authored Apr 07, 2018
  80ce1dde
Apr 06, 2018
- [X686] Add appropriate ReadAfterLd for the register input to memory forms of ADC/SBB. · c50570fb
  Craig Topper authored Apr 06, 2018
  c50570fb
- [X86] Remove InstRWs for basic arithmetic instructions from Sandy Bridge scheduler model. · b9d298ec
  Craig Topper authored Apr 06, 2018
  b9d298ec
- [X86] Attempt to model basic arithmetic instructions in the... · f0d04261
  Craig Topper authored Apr 06, 2018
  f0d04261
- [X86] Add an extra store address cycle to WriteRMW in the Sandy... · f131b600
  Craig Topper authored Apr 06, 2018
  f131b600
- [X86] Merge itineraries for CLC, CMC, and STC. · 22d25a08
  Craig Topper authored Apr 06, 2018
  22d25a08
- [X86][SandyBridge] Add (V)DPPS memory fold latencies · 09eeb3a8
  Simon Pilgrim authored Apr 06, 2018
  09eeb3a8
- [X86][SandyBridge] SBWriteResPair +5cy Memory Folds · 8a83f16c
  Simon Pilgrim authored Apr 06, 2018
  8a83f16c
- [X86][SkylakeServer] Merge 2 InstRW entries to the same sched group. NFCI. · fd1f4fe5
  Simon Pilgrim authored Apr 06, 2018
  fd1f4fe5
Apr 05, 2018
- [X86] Separate CDQ and CDQE in the scheduler model. · fbe3132f
  Craig Topper authored Apr 05, 2018
  fbe3132f
- [X86] Add MOVZPQILo2PQIrr to the Sandy Bridge scheduler model · 4cc38277
  Craig Topper authored Apr 05, 2018
  4cc38277
- [X86] Add LEAVE instruction to the scheduler models using the same data as... · 3b0b96c5
  Craig Topper authored Apr 05, 2018
  3b0b96c5
- [X86] Remove some InstRWs for plain store instructions on Sandy Bridge. · c6bb36a3
  Craig Topper authored Apr 05, 2018
  c6bb36a3
- [X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents. · 9eec2025
  Craig Topper authored Apr 05, 2018
  9eec2025
- [X86] Disassembler support for having an ADSIZE prefix affect instructions... · 665f7441
  Craig Topper authored Apr 05, 2018
  665f7441
- [X86] Use WriteFShuffle256 for VEXTRACTF128 to be consistent with VEXTRACTI128... · 6ecdb03f
  Craig Topper authored Apr 05, 2018
  6ecdb03f
- [MC][Tablegen] Allow models to describe the retire control unit for llvm-mca. · c74ad502
  Andrea Di Biagio authored Apr 05, 2018
  c74ad502
- [X86] Revert r329251-329254 · 15303dda
  Craig Topper authored Apr 05, 2018
  15303dda
- [X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents. · 25c7110a
  Craig Topper authored Apr 05, 2018
  25c7110a
- [X86] Use WriteFShuffle256 for VEXTRACTF128 to be consistent with VEXTRACTI128... · 4b1fdd49
  Craig Topper authored Apr 05, 2018
  4b1fdd49
- [X86] Auto-generate complete checks. NFC · 5c365574
  Craig Topper authored Apr 05, 2018
  5c365574
Apr 04, 2018
- [MachineOutliner] Add `useMachineOutliner` target hook · bccd18b8
  Jessica Paquette authored Apr 04, 2018
  bccd18b8
- [X86] Separate BSWAP32r and BSWAP64r scheduling data in... · 498875fa
  Craig Topper authored Apr 04, 2018
  498875fa
- Sort targetgen calls in lib/Target/*/CMakeLists. · 1cbd0969
  Nico Weber authored Apr 04, 2018
  1cbd0969
- Make helpers static. NFC. · 1fc0da48
  Benjamin Kramer authored Apr 04, 2018
  1fc0da48
- [X86] Use the same predicate for the load for PMOVSXBQ and PMOVZXBQ. · a30db995
  Craig Topper authored Apr 04, 2018
  a30db995
- [X86] Use loadi16/loadi32 predicates in multiply patterns · a3cac956
  Craig Topper authored Apr 04, 2018
  a3cac956
- [X86] Remove more dead code left over from the handling of i8/i16... · 88e38e3e
  Craig Topper authored Apr 04, 2018
  88e38e3e
- [X86] Remove dead code for handling i8/i16 UMUL_LOHI/SMUL_LOHI from X86ISelDAGToDAG.cpp. NFC · afa22edc
  Craig Topper authored Apr 04, 2018
  afa22edc