Commits · e63e02cb0c5be2e52ff5c8ae7e8ad6090e769e18 · Roger Ferrer / llvm-epi · GitLab

Apr 05, 2016
- [AMDGPU] Emit linkonce and linkonce_odr symbols · e63e02cb
  Konstantin Zhuravlyov authored Apr 05, 2016
  e63e02cb
Apr 01, 2016
- AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2} · 354a43c7
  Tom Stellard authored Apr 01, 2016
  354a43c7
- testcase gardening: update the emissionKind enum to the new syntax. (NFC) · b8089516
  Adrian Prantl authored Apr 01, 2016
  b8089516
Mar 31, 2016
- AMDGPU: Add frexp_exp intrinsic · 2fe4fbc1
  Matt Arsenault authored Mar 30, 2016
  2fe4fbc1
Mar 30, 2016
- AMDGPU/SI: Improve MachineSchedModel definition · 1d5e6d4b
  Tom Stellard authored Mar 30, 2016
  1d5e6d4b
- AMDGPU/SI: Enable lanemask tracking in misched · 0bc954e3
  Tom Stellard authored Mar 30, 2016
  0bc954e3
Mar 29, 2016
- fix checks: *_DAG -> *-DAG · 1f867c6f
  Sanjay Patel authored Mar 28, 2016
  1f867c6f
Mar 28, 2016
- CodeGen: Correct specification of PHI nodes · 2bd8eeb6
  Matthias Braun authored Mar 28, 2016
  2bd8eeb6
- AMDGPU/SI: Limit load clustering to 16 bytes instead of 4 instructions · a76bcc2e
  Tom Stellard authored Mar 28, 2016
  a76bcc2e
Mar 24, 2016
- LiveInterval: Fix Distribute() failing on liveranges with unused VNInfos · ae81c293
  Matthias Braun authored Mar 24, 2016
  ae81c293
- AMDGPU: Remove atomic inc/dec patterns · 30d37a74
  Matt Arsenault authored Mar 23, 2016
  30d37a74
- AMDGPU: Promote alloca should skip volatiles · 0a30e456
  Matt Arsenault authored Mar 23, 2016
  0a30e456
Mar 23, 2016
- AMDGPU: Insert moves of frame index to value operands · f43c2a0b
  Matt Arsenault authored Mar 23, 2016
  f43c2a0b
Mar 21, 2016
- AMDGPU: Add SIWholeQuadMode pass · 213e87f2
  Nicolai Haehnle authored Mar 21, 2016
  213e87f2
- AMDGPU/SI: Fix threshold calculation for branching when exec is zero · 92339e88
  Tom Stellard authored Mar 21, 2016
  92339e88
- AMDGPU: Remove SignBitIsZero for mubuf scratch offsets · cb38a6bd
  Matt Arsenault authored Mar 21, 2016
  cb38a6bd
- AMDGPU: Add frexp_mant intrinsic · b96b5734
  Matt Arsenault authored Mar 21, 2016
  b96b5734
Mar 18, 2016
- AMDGPU: Overload return type of llvm.amdgcn.buffer.load.format · 95e8ffd3
  Nicolai Haehnle authored Mar 18, 2016
  95e8ffd3
- AMDGPU/SI: Add llvm.amdgcn.buffer.atomic.* intrinsics · ad63638f
  Nicolai Haehnle authored Mar 18, 2016
  ad63638f
- AMDGPU: use ComplexPattern for offsets in llvm.amdgcn.buffer.load/store.format · 3003ba00
  Nicolai Haehnle authored Mar 18, 2016
  3003ba00
- [AMDGPU] Assembler: Change dpp_ctrl syntax to match sp3 · a74cd526
  Sam Kolton authored Mar 18, 2016
  a74cd526
Mar 17, 2016
- AMDGPU/SI: Do not generate s_waitcnt after ds_permute/ds_bpermute · 234fcb81
  Changpeng Fang authored Mar 17, 2016
  234fcb81
Mar 16, 2016
- AMDGPU: Prevent uniform loops from becoming infinite · ef160de3
  Nicolai Haehnle authored Mar 16, 2016
  ef160de3
Mar 15, 2016
- AMDGPU/SI: Implement GroupStaticSize Intrinsic for Dynamic LDS · 01f60622
  Changpeng Fang authored Mar 15, 2016
  01f60622
Mar 14, 2016
- AMDGPU/SI: Handle wait states required for DPP instructions · 331f981c
  Tom Stellard authored Mar 14, 2016
  331f981c
- AMDGPU/SI: Incomplete shader binaries need to finish execution at the end · ed2213e6
  Marek Olsak authored Mar 14, 2016
  ed2213e6
Mar 11, 2016
- Update test case to appease bots after 263255. · e6a52316
  Chad Rosier authored Mar 11, 2016
  e6a52316
- [AMDGPU] Assembler: change v_madmk operands to have same order as mad. · 6560781c
  Nikolay Haustov authored Mar 11, 2016
  6560781c
- AMDGPU: Materialize sign bits with bfrev · 9a19c240
  Matt Arsenault authored Mar 11, 2016
  9a19c240
Mar 10, 2016
- AMDGPU/SI: add llvm.amdgcn.buffer.load/store.format intrinsics · b142770b
  Nicolai Haehnle authored Mar 10, 2016
  b142770b
- AMDGPU/SI: Define S_GETREG Intrinsic · 278a5b31
  Changpeng Fang authored Mar 10, 2016
  278a5b31
Mar 09, 2016
- SelectionDAG: Fix a crash on inline asm when output register supports multiple types · 9f2e00de
  Tom Stellard authored Mar 09, 2016
  9f2e00de
- [AMDGPU] Assembler: Support DPP instructions. · dfa29f7c
  Sam Kolton authored Mar 09, 2016
  dfa29f7c
Mar 07, 2016
- AMDGPU: Match more med3 integer patterns · c89f2919
  Matt Arsenault authored Mar 07, 2016
  c89f2919
Mar 05, 2016
- RegisterCoalescer: Remap subregister lanemasks before exchanging operands · 4797ec95
  Matthias Braun authored Mar 05, 2016
  4797ec95
Mar 04, 2016
- AMDGPU/SI: Add support for spiling SGPRs to scratch buffer · 649b5db5
  Tom Stellard authored Mar 04, 2016
  649b5db5
- AMDGPU/SI: add llvm.amdgcn.image.atomic.* intrinsics · 5bf46ac1
  Nikolay Haustov authored Mar 04, 2016
  5bf46ac1
Mar 02, 2016
- DAGCombiner: Make sure an integer is being truncated · 7d0a77b9
  Matt Arsenault authored Mar 02, 2016
  7d0a77b9
Mar 01, 2016
- DAGCombiner: Turn truncate of a bitcasted vector to an extract · b36d462f
  Matt Arsenault authored Mar 01, 2016
  b36d462f
- DAGCombiner: Turn extract of bitcasted integer into truncate · 03dac8d8
  Matt Arsenault authored Mar 01, 2016
  03dac8d8