Commits · e664319e7a12b328609dcc0c750c6147e7f357b2 · Roger Ferrer / llvm-epi · GitLab

Jul 19, 2019
- AMDGPU: Don't rely on m0 being -1 for GWS offsets · 48c0df5d
  Matt Arsenault authored Jul 19, 2019
  48c0df5d
- AMDGPU: Force s_waitcnt after GWS instructions · 85f38901
  Matt Arsenault authored Jul 19, 2019
  85f38901
- LiveIntervals: Fix handleMove asserting on BUNDLE · c14334e9
  Matt Arsenault authored Jul 19, 2019
  c14334e9
- [AMDGPU] Add test case on crashing of `si-lower-sgpr-spills` pass · ff9c9e64
  Michael Liao authored Jul 19, 2019
  ff9c9e64
- Revert "Use the MachineBasicBlock symbol for a callbr target" · 4e9196eb
  Nick Desaulniers authored Jul 19, 2019
  4e9196eb
- [RISCV] Disable tests failing on buildbots. · 2272be94
  Matt Morehouse authored Jul 19, 2019
  2272be94
- AMDGPU/GlobalISel: Fix MMO flags for kernel argument loads · 7df225df
  Matt Arsenault authored Jul 19, 2019
  7df225df
- [llvm-lipo] Remove trailing whitespace. NFC · b50f1087
  Shoaib Meenai authored Jul 19, 2019
  b50f1087
- AMDGPU: Add some function return test cases · 870f49e6
  Matt Arsenault authored Jul 19, 2019
  870f49e6
- [AMDGPU] Regenerate test file for upcoming patch. NFCI. · 00542301
  Simon Pilgrim authored Jul 19, 2019
  00542301
- AMDGPU: Attempt to fix bot error · fd8a3651
  Matt Arsenault authored Jul 19, 2019
  fd8a3651
- AMDGPU/GlobalISel: Selection for fminnum/fmaxnum · 08494f62
  Matt Arsenault authored Jul 19, 2019
  08494f62
- AMDGPU/GlobalISel: Support arguments with multiple registers · b60a2ae4
  Matt Arsenault authored Jul 19, 2019
  b60a2ae4
- AMDGPU/GlobalISel: Rewrite lowerFormalArguments · fecf43eb
  Matt Arsenault authored Jul 19, 2019
  fecf43eb
- AMDGPU: Decompose all values to 32-bit pieces for calling conventions · 1022c0df
  Matt Arsenault authored Jul 19, 2019
  1022c0df
- DAG: Handle dbg_value for arguments split into multiple subregs · 5905aae1
  Matt Arsenault authored Jul 19, 2019
  5905aae1
- [AMDGPU][MC] Corrected parsing of branch offsets · 4ccb7f8c
  Dmitry Preobrazhensky authored Jul 19, 2019
  4ccb7f8c
- [MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs. · dec62468
  Kai Luo authored Jul 19, 2019
  dec62468
- [X86] for split stack, not save/restore nested arg if unused · e238a4c7
  Than McIntosh authored Jul 19, 2019
  e238a4c7
- [NFC][InstCombine] Tests for 'rem' formation from sub-of-mul-by-'div' (PR42673) · 9998585c
  Roman Lebedev authored Jul 19, 2019
  9998585c
- [NFC][InstCombine] Redundant masking before left-shift: tests with assume · 882bf2a8
  Roman Lebedev authored Jul 19, 2019
  882bf2a8
- Don't update NoTrappingFPMath and FPDenormalMode in resetTargetOptions · 8780c0dd
  Oliver Stannard authored Jul 19, 2019
  8780c0dd
- [llvm-readelf] - A fix for: "--hash-symbols asserts for 64-bit ELFs" · ce2ef288
  George Rimar authored Jul 19, 2019
  ce2ef288
- [IPRA] Don't rely on non-exact function definitions · 0ed77326
  Oliver Stannard authored Jul 19, 2019
  0ed77326
- [ARM] Add <saturate> operand to SQRSHRL and UQRSHLL · 0b001f94
  Mikhail Maltsev authored Jul 19, 2019
  0b001f94
- [AMDGPU] Simplify the exclusive scan used for optimized atomics · 7d06ffff
  Jay Foad authored Jul 19, 2019
  7d06ffff
- [InstCombine] Dropping redundant masking before left-shift [5/5] (PR42563) · f2eb4031
  Roman Lebedev authored Jul 19, 2019
  f2eb4031
- [InstCombine] Dropping redundant masking before left-shift [4/5] (PR42563) · 441c9d6c
  Roman Lebedev authored Jul 19, 2019
  441c9d6c
- [InstCombine] Dropping redundant masking before left-shift [3/5] (PR42563) · 3c212ce3
  Roman Lebedev authored Jul 19, 2019
  3c212ce3
- [InstCombine] Dropping redundant masking before left-shift [2/5] (PR42563) · 2ebe5738
  Roman Lebedev authored Jul 19, 2019
  2ebe5738
- [InstCombine] Dropping redundant masking before left-shift [1/5] (PR42563) · 4422a165
  Roman Lebedev authored Jul 19, 2019
  4422a165
- [InstCombine] Dropping redundant masking before left-shift [0/5] (PR42563) · a5f0824e
  Roman Lebedev authored Jul 19, 2019
  a5f0824e
- [DebugInfo] Some fields do not need relocations even relax is enabled. · c5ecdd3c
  Hsiangkai Wang authored Jul 19, 2019
  c5ecdd3c
- [test] [llvm-objcopy] Fix broken test case · 553c29fa
  Alex Brachet authored Jul 19, 2019
  553c29fa
- [NFC][PowerPC] Modify the test case add_cmp.ll · ca9f68e5
  Kang Zhang authored Jul 19, 2019
  ca9f68e5
- [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame. · 18ccfadd
  Hsiangkai Wang authored Jul 19, 2019
  18ccfadd
- Use the MachineBasicBlock symbol for a callbr target · ccbffefc
  Bill Wendling authored Jul 19, 2019
  ccbffefc
- [GlobalISel] Translate calls to memcpy et al to G_INTRINSIC_W_SIDE_EFFECTs and legalize later. · cf12c781
  Amara Emerson authored Jul 19, 2019
  cf12c781
- Reapply [llvm-lipo] Implement -create (with hardcoded alignments) · 16a96325
  Shoaib Meenai authored Jul 18, 2019
  16a96325
Jul 18, 2019
- [GlobalISel][AArch64] Add support for base register + offset register loads · 7a1dcc5f
  Jessica Paquette authored Jul 18, 2019
  7a1dcc5f