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Commits · e855cc6d04ff540b20ff48cd6bfee3fbf85328b9

llvm-epi
llvm
test
CodeGen
AArch64
arm64-early-ifcvt.ll

Apr 23, 2020
- [AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14] · 78d69e97
  Vedant Kumar authored Apr 15, 2020
  78d69e97
Jun 23, 2017
- [AArch64] Prefer Bcc to CBZ/CBNZ/TBZ/TBNZ when NZCV flags can be set for "free". · 6db9ff64
  Chad Rosier authored Jun 23, 2017
  6db9ff64
Aug 01, 2016
- [AArch64] Register passes so they can be run by llc · 850043b2
  Diana Picus authored Aug 01, 2016
  850043b2
Feb 27, 2015
- [opaque pointer type] Add textual IR support for explicit type parameter to load instruction · a79ac14f
  David Blaikie authored Feb 27, 2015
  a79ac14f
- [opaque pointer type] Add textual IR support for explicit type parameter to... · 79e6c749
  David Blaikie authored Feb 27, 2015
  79e6c749
May 30, 2014
- ARM & AArch64: make use of common cmpxchg idioms after expansion · b4ddc084
  Tim Northover authored May 30, 2014
  b4ddc084
May 24, 2014
- AArch64/ARM64: move ARM64 into AArch64's place · 3b0846e8
  Tim Northover authored May 24, 2014
  3b0846e8
May 19, 2014
- [ARM64] Split tbz/tbnz into W/X register variant · c3b931d0
  Bradley Smith authored May 19, 2014
  c3b931d0
Mar 29, 2014
- ARM64: initial backend import · 00ed9964
  Tim Northover authored Mar 29, 2014
  00ed9964

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