Commits · ea08248b2bc9ab6cd14cfd1a05c4fb0fae49e97a · Roger Ferrer / llvm-epi · GitLab

Jun 24, 2019
- [CodeGen] Add missing vector type legalization for ctlz_zero_undef · ea08248b
  Roland Froese authored Jun 24, 2019
  ea08248b
- [Tests] Add cases where we're failing to discharge provably loop exits (tests for D63733) · b2f09391
  Philip Reames authored Jun 24, 2019
  b2f09391
- [SLP] Support unary FNeg vectorization · fe3f15cf
  Cameron McInally authored Jun 24, 2019
  fe3f15cf
- Remove flag for no longer supported MSVC version · 4412d839
  Nico Weber authored Jun 24, 2019
  4412d839
- [ABI] Implement Windows ABI for x86_64 · 09ede9d6
  Alex Langford authored Jun 24, 2019
  09ede9d6
- AMDGPU/GlobalISel: Select G_TRUNC · dbb6c031
  Matt Arsenault authored Jun 24, 2019
  dbb6c031
- AMDGPU/GlobalISel: RegBankSelect for amdgcn.class · 14d0b646
  Matt Arsenault authored Jun 24, 2019
  14d0b646
- [PowerPC][UpdateTestChecks] powerpc- triple support · 318b6daf
  Jinsong Ji authored Jun 24, 2019
  318b6daf
- AMDGPU/GlobalISel: Split VALU s64 G_ZEXT/G_SEXT in RegBankSelect · 8fcd5ade
  Matt Arsenault authored Jun 24, 2019
  8fcd5ade
- [llvm-objdump] Match GNU objdump on symbol types shown in disassembly · 6e04b92c
  Yuanfang Chen authored Jun 24, 2019
  6e04b92c
- Move common functionality from processwindows into processdebugger · 9c01eaff
  Aaron Smith authored Jun 24, 2019
  9c01eaff
- [AMDGPU] Allow any value in unused src0 field in v_nop · d2fdb956
  Tim Renouf authored Jun 24, 2019
  d2fdb956
- [X86] Don't a vzext_movl in LowerBuildVectorv16i8/LowerBuildVectorv8i16 if... · 7fccb2ac
  Craig Topper authored Jun 24, 2019
  7fccb2ac
- [X86] Cleanups and safety checks around the isFNEG · 033774e1
  Craig Topper authored Jun 24, 2019
  033774e1
- [AArch64] Regenerate vcvt tests. NFCI. · fd7d0d4e
  Simon Pilgrim authored Jun 24, 2019
  fd7d0d4e
- [AArch64] Regenerate 2velem tests. NFCI. · de1ce823
  Simon Pilgrim authored Jun 24, 2019
  de1ce823
- [AArch64] Regenerate merge-store tests. NFCI. · 0f0bbbd4
  Simon Pilgrim authored Jun 24, 2019
  0f0bbbd4
- [clang][NewPM] Add RUNS for tests that produce slightly different IR under new PM · f336eb34
  Leonard Chan authored Jun 24, 2019
  f336eb34
- [clang][NewPM] Remove exception handling before loading pgo sample profile data · f948f6b8
  Leonard Chan authored Jun 24, 2019
  f948f6b8
- [X86] Regenerate fast fadd reduction tests. NFCI · cf6917c6
  Simon Pilgrim authored Jun 24, 2019
  cf6917c6
- AMDGPU/GlobalISel: Fix selecting G_IMPLICIT_DEF for s1 · f8a841b8
  Matt Arsenault authored Jun 24, 2019
  f8a841b8
- [bindings/go] Add debug information accessors · 9f4c7e81
  Ayke van Laethem authored Jun 24, 2019
  9f4c7e81
- [analyzer] print() JSONify: ProgramPoint revision · 3a4a60eb
  Csaba Dabis authored Jun 24, 2019
  3a4a60eb
- Hexagon: Rename another copy of Register class · ae171f1e
  Matt Arsenault authored Jun 24, 2019
  ae171f1e
- ARC: Fix -Wimplicit-fallthrough · f8f1ace5
  Matt Arsenault authored Jun 24, 2019
  f8f1ace5
- GlobalISel: Remove unsigned variant of SrcOp · faeaedf8
  Matt Arsenault authored Jun 24, 2019
  faeaedf8
- [analyzer] Fix JSON dumps for ExplodedNodes · 906d494b
  Csaba Dabis authored Jun 24, 2019
  906d494b
- CodeGen: Introduce a class for registers · e3a676e9
  Matt Arsenault authored Jun 24, 2019
  e3a676e9
- [AMDGPU] Remove unused variable AllSGPRSpilledToVGPRs. NFC · 3260ef16
  Bjorn Pettersson authored Jun 24, 2019
  3260ef16
- [OPENMP]Relax the test checks to pacify 32bit buildbots, NFC. · db26bcda
  Alexey Bataev authored Jun 24, 2019
  db26bcda
- Hexagon: Rename Register class · 2bc35b79
  Matt Arsenault authored Jun 24, 2019
  2bc35b79
- [InstCombine] reduce funnel-shift i16 X, X, 8 to bswap X · 89efefb1
  Sanjay Patel authored Jun 24, 2019
  89efefb1
- AMDGPU/GlobalISel: Fix RegBankSelect for s1 sext/zext/anyext · 5dbd9228
  Matt Arsenault authored Jun 24, 2019
  5dbd9228
- AMDGPU: Fold frame index into MUBUF · 60957cb7
  Matt Arsenault authored Jun 24, 2019
  60957cb7
- [InstCombine] add tests for funnel-shift to bswap; NFC · f27f794d
  Sanjay Patel authored Jun 24, 2019
  f27f794d
- [CUDA][HIP] Don't set comdat attribute for CUDA device stub... · 15e678e8
  Konstantin Pyzhov authored Jun 24, 2019
  15e678e8
- AMDGPU: Cleanup checking when spills need emergency slots · 942404d0
  Matt Arsenault authored Jun 24, 2019
  942404d0
- [InstCombine] SliceUpIllegalIntegerPHI - bail on out of range shifts · b617b080
  Simon Pilgrim authored Jun 24, 2019
  b617b080
- [clangd] Improve SelectionTree string representation · ca89eb5f
  Sam McCall authored Jun 24, 2019
  ca89eb5f
- [DAGCombine] visitMUL - allow shift by zero in MulByConstant. · 69144a92
  Simon Pilgrim authored Jun 24, 2019
  69144a92