Commits · ec9d7ea4f5bb4e0d07ca9e3aa77b0279b19e58b1 · Roger Ferrer / llvm-epi · GitLab

Jun 02, 2020
- [mips] Support 64-bit relative relocations · b00f0d42
  Simon Atanasyan authored Apr 24, 2020
  b00f0d42
- [VE] Support I32/F32 registers in assembler parser · ec2e9ce7
  Kazushi (Jam) Marukawa authored Jun 02, 2020
  ec2e9ce7
- [X86] Fix a few recursivelyDeleteUnusedNodes calls that were trying to delete... · e51d5bc7
  Craig Topper authored Jun 01, 2020
  e51d5bc7
- [AArch64][GlobalISel] Split G_GLOBAL_VALUE into ADRP + G_ADD_LOW and optimize. · f573d489
  Amara Emerson authored May 29, 2020
  f573d489
- [AArch64] Fix CollectLOH creating an AdrpAdd LOH when there's a live used reg · 19ff00da
  Amara Emerson authored May 29, 2020
  19ff00da
Jun 01, 2020
- AMDGPU: Change internal tracking of wave size · a8f72092
  Matt Arsenault authored Jun 01, 2020
  a8f72092
- AMDGPU: Fix not emitting nofpexcept on fdiv expansion · 89d48cca
  Matt Arsenault authored May 27, 2020
  89d48cca
- AMDGPU: Fix test in code directory · 20793b2a
  Matt Arsenault authored Jun 01, 2020
  
  20793b2a
- AMDGPU: Remove dead file · ed08c4fb
  Matt Arsenault authored Jun 01, 2020
  
  ed08c4fb
- [AMDGPU/MemOpsCluster] Let mem ops clustering logic also consider number of clustered bytes · 0ed2c046
  hsmahesha authored Jun 01, 2020
  0ed2c046
- AMDGPU: Fix alignment for dynamic allocas · 7ad36491
  Matt Arsenault authored May 30, 2020
  7ad36491
- [WebAssembly] Update test expectations · 26c78e30
  Sam Clegg authored Jun 01, 2020
  26c78e30
- ARMFrameLowering.h - remove unnecessary includes. NFC. · 014648e8
  Simon Pilgrim authored Jun 01, 2020
  014648e8
- AArch64: materialize large stack offset into xzr correctly. · dace8224
  Tim Northover authored Apr 22, 2020
  dace8224
- [PowerPC] Exploit vabsd on P9 · 3101601b
  Li Rong Yi authored Jun 01, 2020
  3101601b
- AMDGPU/GlobalISel: Add stub reg-bank aware combiner pass · a8ca0ec2
  Matt Arsenault authored May 31, 2020
  
  a8ca0ec2
May 31, 2020
- [X86] Rewrite how X86PartialReduction finds candidates to consider optimizing. · 8abe8300
  Craig Topper authored May 31, 2020
  8abe8300
- [X86][AVX] Reduce unary target shuffles width if the upper elements aren't demanded. · 22e50833
  Simon Pilgrim authored May 31, 2020
  
  22e50833
- [X86][AVX] combineX86ShufflesRecursively - peekThroughOneUseBitcasts subvector before widening. · 8f2f613a
  Simon Pilgrim authored May 31, 2020
  8f2f613a
- [X86][AVX] Add SimplifyMultipleUseDemandedBits VBROADCAST handling to SimplifyDemandedVectorElts. · 4a2673d7
  Simon Pilgrim authored May 31, 2020
  4a2673d7
- [X86] getFauxShuffleMask/getTargetShuffleInputs - make SelectionDAG const (PR45974). · f0463268
  Simon Pilgrim authored May 31, 2020
  f0463268
- [X86][AVX] getFauxShuffleMask - don't widen shuffle inputs from INSERT_SUBVECTOR(X,SHUFFLE(Y,Z)) · d33ba1aa
  Simon Pilgrim authored May 31, 2020
  d33ba1aa
- [X86][AVX] Pad small shuffle inputs in combineX86ShufflesRecursively · 45ebe38f
  Simon Pilgrim authored May 31, 2020
  45ebe38f
- [AMDGPU] Propagate fast-math flags when lowering FSIN and FCOS · 2768edff
  Jay Foad authored May 29, 2020
  2768edff
- AMDGPU: Add setTruncStoreAction for vector i64 types made legal recently · 234eba90
  Changpeng Fang authored May 30, 2020
  234eba90
- [X86] Remove unneeded bitconverts from isel patterns. NFC · dbda8718
  Craig Topper authored May 30, 2020
  dbda8718
- [X86] Add DAG combine to turn (v2i64 (scalar_to_vector (i64 (bitconvert... · 7c3b8077
  Craig Topper authored May 30, 2020
  7c3b8077
- [X86] Teach computeKnownBitsForTargetNode that the upper half of X86ISD::MOVQ2DQ is all zero. · af1accdd
  Craig Topper authored May 30, 2020
  
  af1accdd
- [X86] Fix a place where we created MOVQ2DQ with a DstVT other than v2i64. · 1ecf39d6
  Craig Topper authored May 30, 2020
  1ecf39d6
- [X86] Move MMX_SET0 pattern into the instruction definition. NFC · 88578224
  Craig Topper authored May 30, 2020
  
  88578224
- [X86] Add pseudo instructions to use MULX with a single destination when the low result isn't used. · 07e8a780
  Craig Topper authored May 30, 2020
  07e8a780
May 30, 2020
- [X86] Minor cleanups to addShuffleComments in X86MCInstPrinter.cpp. NFCI · 16976cb9
  Craig Topper authored May 30, 2020
  16976cb9
- [X86] Factor constant pool comment printing out of the switch in... · 3eb430d5
  Craig Topper authored May 30, 2020
  3eb430d5
- [AArch64] Treat x18 as callee-saved in functions with windows calling... · cf97e0ec
  Martin Storsjö authored Apr 30, 2019
  cf97e0ec
- [AMDGPU] Remove assertion on S1024 SGPR to VGPR spill · d0414778
  Carl Ritson authored May 30, 2020
  d0414778
- AMDGPU: Optimize s_setreg_b32 to s_denorm_mode/s_round_mode · 0892a96a
  Matt Arsenault authored May 28, 2020
  0892a96a
- AMDGPU: Move MIMG MMO check to verifier · f012c58a
  Matt Arsenault authored May 28, 2020
  
  f012c58a
- [SVE] Eliminate calls to default-false VectorType::get() from AMDGPU · aad93654
  Christopher Tetreault authored May 29, 2020
  aad93654
- [SVE] Eliminate calls to default-false VectorType::get() from X86 · 5a99ec10
  Christopher Tetreault authored May 29, 2020
  5a99ec10
- [SVE] Eliminate calls to default-false VectorType::get() from AArch64 · 56eb7556
  Christopher Tetreault authored May 29, 2020
  56eb7556