Commits · efd6f1c8e2a89764d141e5c24ac768b9ed5ff05e · Roger Ferrer / llvm-epi · GitLab

Mar 21, 2018
- [POWER9][NFC] update testcase check statements · efd6f1c8
  Lei Huang authored Mar 21, 2018
  efd6f1c8
- [InstSimplify] fp_binop X, NaN --> NaN · e235942a
  Sanjay Patel authored Mar 21, 2018
  e235942a
- [Hexagon] Eliminate subregisters from PHI nodes before pipelining · c715a5d2
  Krzysztof Parzyszek authored Mar 21, 2018
  c715a5d2
- [RISCV] Codegen support for RV32F floating point comparison operations · 65d6ea5e
  Alex Bradbury authored Mar 21, 2018
  65d6ea5e
- [RISCV] Add tests missed from r327979 · 77d5927a
  Alex Bradbury authored Mar 21, 2018
  77d5927a
- [X86] Fix the SchedRW for XOP vpcom register form instructions to not be marked as loads. · 137a4dd8
  Craig Topper authored Mar 21, 2018
  137a4dd8
- [X86] Change PMULLD to 10 cycles on Skylake per Agner's tables and llvm-exegesis. · d25f1acf
  Craig Topper authored Mar 20, 2018
  d25f1acf
Mar 20, 2018
- [WebAssembly] Strip threadlocal attribute from globals in single thread mode · 39b5367c
  Derek Schuff authored Mar 20, 2018
  39b5367c
- [X86] Don't use the MSVC stack protector names on mingw · 07589fc4
  Martin Storsjö authored Mar 20, 2018
  07589fc4
- [AArch64] Add vmulxh_lane fp16 vector intrinsic · 4c60c222
  Abderrazek Zaafrani authored Mar 20, 2018
  4c60c222
- [Hexagon] Add a few more lit tests, NFC · 4094ab73
  Krzysztof Parzyszek authored Mar 20, 2018
  4094ab73
- [Hexagon] Add heuristic to exclude critical path cost for scheduling · 65059ee2
  Krzysztof Parzyszek authored Mar 20, 2018
  65059ee2
- [PowerPC][LegalizeFloatTypes] Move the PPC hacks for (i32... · c2dbd677
  Craig Topper authored Mar 20, 2018
  c2dbd677
- [X86] Add phony registers for high halves of regs with low halves · eb0c510e
  Krzysztof Parzyszek authored Mar 20, 2018
  eb0c510e
- [NVPTX] Make tensor load/store intrinsics overloaded. · 914d4bab
  Artem Belevich authored Mar 20, 2018
  914d4bab
- [Hexagon] Correct the computation of TopReadyCycle and BotReadyCycle of SU · 4c6b65f6
  Krzysztof Parzyszek authored Mar 20, 2018
  4c6b65f6
- [XRay] Lazily compute MachineLoopInfo instead of requiring it. · fb3f509e
  Michael Zolotukhin authored Mar 20, 2018
  fb3f509e
- [AArch64] add fabs tests for PR36600; NFC · 5a9210e6
  Sanjay Patel authored Mar 20, 2018
  5a9210e6
- [X86][Haswell][Znver1] Fix typo in fldl instregexs · 62690e9d
  Simon Pilgrim authored Mar 20, 2018
  62690e9d
- [RISCV] Add codegen for RV32F floating point load/store · 80c8eb76
  Alex Bradbury authored Mar 20, 2018
  80c8eb76
- [RISCV] Add codegen for RV32F arithmetic and conversion operations · 76c29ee8
  Alex Bradbury authored Mar 20, 2018
  76c29ee8
- [Hexagon] Improve scheduling based on register pressure · dca38312
  Krzysztof Parzyszek authored Mar 20, 2018
  dca38312
- [AVR] Add a regression test for struct return lowering · 212841b7
  Dylan McKay authored Mar 20, 2018
  212841b7
- [SystemZ] Add "REQUIRES: asserts" to test case to fix build bots. · 8ad035d8
  Jonas Paulsson authored Mar 20, 2018
  8ad035d8
- [X86] Properly implement the calling convention for f80 for mingw/x86_64 · 802b4341
  Martin Storsjö authored Mar 20, 2018
  802b4341
- [X86] Fix the SchedRW for memory forms of CMP and TEST. · 4778fa7e
  Craig Topper authored Mar 20, 2018
  4778fa7e
- [X86] Add TEST16mi/TEST32mi/TEST64mi32 to the... · 3e946260
  Craig Topper authored Mar 20, 2018
  3e946260
- [X86] Add ROR/ROL/SHR/SAR by 1 instructions to the Sandy Bridge scheduler model. · 7c90e29c
  Craig Topper authored Mar 20, 2018
  7c90e29c
- [ShrinkWrap] Take into account landing pad · 508f6823
  Quentin Colombet authored Mar 20, 2018
  508f6823
- [RISCV] Preserve stack space for outgoing arguments when the function contain variable size objects · cbd498ac
  Shiva Chen authored Mar 20, 2018
  cbd498ac
- [X86] Fix the SNB scheduler for BLENDVB. · 2330d6cd
  Craig Topper authored Mar 20, 2018
  2330d6cd
- Run dos2unix on a test. NFC. · d947977e
  Rafael Espindola authored Mar 20, 2018
  d947977e
Mar 19, 2018
- [SelectionDAG] Transfer DbgValues when integer operations are promoted · 67389605
  Aaron Smith authored Mar 19, 2018
  67389605
- [MachineOutliner] AArch64: Emit CFI instructions when outlining calls · 563548d8
  Jessica Paquette authored Mar 19, 2018
  563548d8
- [Hexagon] Add REQUIRES: asserts to test/CodeGen/Hexagon/v6vec_inc1.ll · c76fefc6
  Krzysztof Parzyszek authored Mar 19, 2018
  c76fefc6
- [DAG, X86] Revert r327197 "Revert r327170, r327171, r327172" · 3264c1bd
  Nirav Dave authored Mar 19, 2018
  3264c1bd
- [ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probes · 9a55c1b0
  Martin Storsjö authored Mar 19, 2018
  9a55c1b0
- [AMDGPU] change test to avoid NaN math · f2d85e78
  Sanjay Patel authored Mar 19, 2018
  f2d85e78
- [AMDGPU] adjust tests to be nan-free · dad3d13b
  Sanjay Patel authored Mar 19, 2018
  dad3d13b
- [Power9]Legalize and emit code for quad-precision copySign/abs/nabs/neg/sqrt · ecfede94
  Lei Huang authored Mar 19, 2018
  ecfede94