- Jun 21, 2018
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Simon Atanasyan authored
As agreed with Simon Dardis, I'm taking over as a code owner for the MIPS backend. llvm-svn: 335213
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David Green authored
The alignment parameter to getExtLoad is treated as a base alignment, not the alignment of the load (base + offset). When we infer a better alignment for a Ptr we need to ensure that it applies to the base to prevent the alignment on the load from being wrong. This fixes a bug where the alignment could then be used to incorrectly prove noalias between a load and a store, leading to a miscompile. Differential Revision: https://reviews.llvm.org/D48029 llvm-svn: 335210
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Eric Christopher authored
This is the only line other than the function signature remaining of the original patch. llvm-svn: 335208
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Eric Christopher authored
llvm-svn: 335207
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Florian Hahn authored
r335150 should resolve the issues with the clang-with-thin-lto-ubuntu and clang-with-lto-ubuntu builders. Original message: This patch updates IPSCCP to use PredicateInfo to propagate facts to true branches predicated by EQ and to false branches predicated by NE. As a follow up, we should be able to extend it to also propagate additional facts about nonnull. Reviewers: davide, mssimpso, dberlin, efriedma Reviewed By: davide, dberlin llvm-svn: 335206
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Mikael Holmen authored
Summary: Fixes PR36579. For cases where we had e.g. DBG_VALUE 42 [...] DBG_VALUE undef LiveDebugVariables would discard all undef DBG_VALUEs and then it would look like the variable had the value 42 throughout the rest of the function, which is incorrect. With this patch we don't remove all undef DBG_VALUEs in LiveDebugVariables so they will be kept after register allocation just like other DBG_VALUEs which will yield more correct debug information. Reviewers: aprantl Reviewed By: aprantl Subscribers: bjope, Ka-Ka, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D48277 llvm-svn: 335205
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Craig Topper authored
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR. This is mostly the stack folding tests and is by no means a thorough audit of tests. llvm-svn: 335204
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Chandler Carruth authored
conditions feeding a chain of `and`s or `or`s for a branch. Much like with full non-trivial unswitching, we rely on the pass manager to handle iterating until all of the profitable unswitches have been done. This is to allow other more profitable unswitches to fire on any of the cloned, simpler versions of the loop if viable. Threading the partial unswiching through the non-trivial unswitching logic motivated some minor refactorings. If those are too disruptive to make it reasonable to review this patch, I can separate them out, but it'll be somewhat timeconsuming so I wanted to send it for initial review as-is. Feel free to tell me whether it warrants pulling apart. I've tried to re-use (and factor out) logic form the partial trivial unswitching, but not as much could be shared as I had haped. Still, this wasn't as bad as I naively expected. Some basic testing is added, but I probably need more. Suggestions for things you'd like to see tested more than welcome. One thing I'd like to do is add some testing that when we schedule this with loop-instsimplify it effectively cleans up the cruft created. Last but not least, this uncovered a bug that has been in loop cloning the entire time for non-trivial unswitching. Specifically, we didn't correctly add the outer-most cloned loop to the list of cloned loops. This meant that LCSSA wouldn't be updated for it hypothetically, and more significantly that we would never visit it in the loop pass manager. I noticed this while checking loop-instsimplify by hand. I'll try to separate this bugfix out into its own patch with a more focused test. But it is just one line, so shouldn't significantly confuse the review here. After this patch, the only missing "feature" in this unswitch I'm aware of us non-trivial unswitching of switches. I'll try implementing *full* non-trivial unswitching of switches (which is at least a sound thing to implement), but *partial* non-trivial unswitching of switches is something I don't see any sound and principled way to implement. I also have no interesting test cases for the latter, so I'm not really worried. The rest of the things that need to be ported are bug-fixes and more narrow / targeted support for specific issues. Differential Revision: https://reviews.llvm.org/D47522 llvm-svn: 335203
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Chandler Carruth authored
stable in non-asserts builds. This fixes a test failure in release config. llvm-svn: 335202
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Michael Zolotukhin authored
Summary: Since the value stored in the cache might be deleted or replaced with something else, we need to use tracking ValueHandlers instead of plain Value pointers. It was discovered in one of internal builds, and unfortunately there is no small reproducer for the issue. The cache was introduced in rL327328. Reviewers: ahatanak, pete Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D48407 llvm-svn: 335201
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Craig Topper authored
llvm-svn: 335199
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Tim Shen authored
This reverts commit r335197, as some bots are not happy. llvm-svn: 335198
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Tim Shen authored
Summary: Try to match udiv and urem patterns, and sink zext down to the leaves. I'm not entirely sure why some unrelated tests change, but the added <nsw>s seem right. Reviewers: sanjoy Subscribers: jlebar, hiraditya, bixia, llvm-commits Differential Revision: https://reviews.llvm.org/D48338 llvm-svn: 335197
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Wolfgang Pieb authored
Errors found processing the DW_AT_ranges attribute are propagated by lower level routines and reported by their callers. Reviewer: JDevlieghere Differential Revision: https://reviews.llvm.org/D48344 llvm-svn: 335188
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Simon Dardis authored
These are identical but use microMIPS instructions instead of MIPS instructions. Also, flatten the 'let AdditionalPredicates = [InMicroMips]' by using the ISA_MICROMIPS adjective. Add tests for constant materialization. Reviewers: atanasyan, abeserminji, smaksimovic Differential Revision: https://reviews.llvm.org/D48275 llvm-svn: 335185
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Alina Sbirlea authored
Summary: Two utils methods have essentially the same functionality. This is an attempt to merge them into one. 1. lib/Transforms/Utils/Local.cpp : MergeBasicBlockIntoOnlyPred 2. lib/Transforms/Utils/BasicBlockUtils.cpp : MergeBlockIntoPredecessor Prior to the patch: 1. MergeBasicBlockIntoOnlyPred Updates either DomTree or DeferredDominance Moves all instructions from Pred to BB, deletes Pred Asserts BB has single predecessor If address was taken, replace the block address with constant 1 (?) 2. MergeBlockIntoPredecessor Updates DomTree, LoopInfo and MemoryDependenceResults Moves all instruction from BB to Pred, deletes BB Returns if doesn't have a single predecessor Returns if BB's address was taken After the patch: Method 2. MergeBlockIntoPredecessor is attempting to become the new default: Updates DomTree or DeferredDominance, and LoopInfo and MemoryDependenceResults Moves all instruction from BB to Pred, deletes BB Returns if doesn't have a single predecessor Returns if BB's address was taken Uses of MergeBasicBlockIntoOnlyPred that need to be replaced: 1. lib/Transforms/Scalar/LoopSimplifyCFG.cpp Updated in this patch. No challenges. 2. lib/CodeGen/CodeGenPrepare.cpp Updated in this patch. i. eliminateFallThrough is straightforward, but I added using a temporary array to avoid the iterator invalidation. ii. eliminateMostlyEmptyBlock(s) methods also now use a temporary array for blocks Some interesting aspects: - Since Pred is not deleted (BB is), the entry block does not need updating. - The entry block was being updated with the deleted block in eliminateMostlyEmptyBlock. Added assert to make obvious that BB=SinglePred. - isMergingEmptyBlockProfitable assumes BB is the one to be deleted. - eliminateMostlyEmptyBlock(BB) does not delete BB on one path, it deletes its unique predecessor instead. - adding some test owner as subscribers for the interesting tests modified: test/CodeGen/X86/avx-cmp.ll test/CodeGen/AMDGPU/nested-loop-conditions.ll test/CodeGen/AMDGPU/si-annotate-cf.ll test/CodeGen/X86/hoist-spill.ll test/CodeGen/X86/2006-11-17-IllegalMove.ll 3. lib/Transforms/Scalar/JumpThreading.cpp Not covered in this patch. It is the only use case using the DeferredDominance. I would defer to Brian Rzycki to make this replacement. Reviewers: chandlerc, spatel, davide, brzycki, bkramer, javed.absar Subscribers: qcolombet, sanjoy, nemanjai, nhaehnle, jlebar, tpr, kbarton, RKSimon, wmi, arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D48202 llvm-svn: 335183
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- Jun 20, 2018
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Bruno Cardoso Lopes authored
This fixes clang+llvm build with Modules and local submodule visibility. llvm-svn: 335181
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Alina Sbirlea authored
Summary: Ideally passes should not need to pass MSSA around and do all updates through the updater. Add convenience APIs to help with that. Reviewers: george.burgess.iv Subscribers: sanjoy, jlebar, llvm-commits, Prazek Differential Revision: https://reviews.llvm.org/D48334 llvm-svn: 335179
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Simon Dardis authored
llvm-svn: 335178
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Benjamin Kramer authored
This fixes an extremely subtle non-determinism that can only be triggered by an unfortunate alignment of passes. In my case: - JumpThreading does large dominator tree updates - CorrelatedValuePropagation preserves domtree now - LICM codegen depends on the order of children on domtree nodes The last part is non-deterministic if the update was stored in a set. But it turns out that the set is completely unnecessary, updates are deduplicated at an earlier stage so we can just use a vector, which is both more efficient and doesn't destroy the input ordering. I didn't manage to get the 240 MB IR file reduced enough, triggering this bug requires a lot of jump threading, so landing this without a test case. Differential Revision: https://reviews.llvm.org/D48392 llvm-svn: 335176
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Alina Sbirlea authored
Summary: Make the MemorySSA verify also check that all Phi incoming blocks are block predecessors. Reviewers: george.burgess.iv Subscribers: sanjoy, jlebar, Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D48333 llvm-svn: 335174
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Craig Topper authored
I don't believe there is any real reason to have separate X86 specific opcodes for vector compares. Setcc has the same behavior just uses a different encoding for the condition code. I had to change the CondCodeAction for SETLT and SETLE to prevent some transforms from changing SETGT lowering. Differential Revision: https://reviews.llvm.org/D43608 llvm-svn: 335173
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Simon Pilgrim authored
As described in D48359, this patch pushes InstructionsState down the BoUpSLP call hierarchy instead of the corresponding raw OpValue. This makes it easier to track the alternate opcode etc. and avoids us having to call getAltOpcode which makes it difficult to support more than one alternate opcode. Differential Revision: https://reviews.llvm.org/D48382 llvm-svn: 335170
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Stanislav Mekhanoshin authored
Previously this folding was done only if select is a first operand. However, for non-commutative operations constant may go before select. Differential Revision: https://reviews.llvm.org/D48223 llvm-svn: 335167
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Sanjay Patel authored
llvm-svn: 335165
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Simon Dardis authored
Additionally, correct the definition of the rdhwr instruction. Reviewers: atanasyan, abeserminji, smaksimovic Differential Revision: https://reviews.llvm.org/D48216 llvm-svn: 335162
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Matt Arsenault authored
llvm-svn: 335161
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Matt Arsenault authored
llvm-svn: 335160
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Krzysztof Parzyszek authored
llvm-svn: 335158
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Sanjay Patel authored
There are more existing potential users of this, but I've limited this patch to the first couple that I found to minimize typo risk. llvm-svn: 335157
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Chandler Carruth authored
The idea of partial unswitching is to take a *part* of a branch's condition that is loop invariant and just unswitching that part. This primarily makes sense with i1 conditions of branches as opposed to switches. When dealing with i1 conditions, we can easily extract loop invariant inputs to a a branch and unswitch them to test them entirely outside the loop. As part of this, we now create much more significant cruft in the loop body, so this relies on adding cleanup passes to the loop pipeline and revisiting unswitched loops to do that cleanup before continuing to process them. This already appears to be more powerful at unswitching than the old loop unswitch pass, and so I'd appreciate pretty careful review in case I'm just missing some correctness checks. The `LIV-loop-condition` test case is not unswitched by the old unswitch pass, but is with this pass. Thanks to Sanjoy and Fedor for the review! Differential Revision: https://reviews.llvm.org/D46706 llvm-svn: 335156
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Alex Bradbury authored
These instructions were renamed in version 2.2 of the user-level ISA spec, but the old name should also be accepted by standard tools. llvm-svn: 335154
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Jessica Paquette authored
The outliner emits debug info. Add a test that outlines a function and uses llvm-dwarfdump to check the emitted DWARF for correctness. llvm-svn: 335153
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Vedant Kumar authored
This utility should operate on Values, not Instructions. While I'm here, I've also made it possible to skip emitting replacement dbg.values for certain debug users (by having RewriteExpr return nullptr). llvm-svn: 335152
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Sanjay Patel authored
These represent the most basic requested transform - a matching operand and 2 constant operands. llvm-svn: 335151
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Florian Hahn authored
Using OrderedInstructions::dominates as comparator for instructions in BBs without dominance relation can cause a non-deterministic order between such instructions. That in turn can cause us to materialize copies in a non-deterministic order. While this does not effect correctness, it causes some minor non-determinism in the final generated code, because values have slightly different labels. Without this patch, running -print-predicateinfo on a reasonably large module produces slightly different output on each run. This patch uses the dominator trees DFSInNum to order instruction from different BBs, which should enforce a deterministic ordering and guarantee that dominated instructions come after the instructions that dominate them. Reviewers: dberlin, efriedma, davide Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D48230 llvm-svn: 335150
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Paul Robinson authored
llvm-svn: 335146
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Vlad Tsyrklevich authored
Summary: Due to uniqueing of DICompositeTypes, it's possible for a type from one module to be loaded into another earlier module without being renamed. Then when the defining module is being IRMoved, the type can be used as a Mapping destination before being loaded, such that when it's requested using TypeMapTy::get() it will fail with an assertion that the type is a source type when it's actually a type in both the source and destination modules. Correctly handle that case by allowing a non-opaque non-literal struct type be present in both modules. Fix for PR37684. Reviewers: pcc, tejohnson Reviewed By: pcc, tejohnson Subscribers: tobiasvk, mehdi_amini, steven_wu, llvm-commits, kcc Differential Revision: https://reviews.llvm.org/D47898 llvm-svn: 335145
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Vedant Kumar authored
The purpose of this utility is to make it easier for optimizations to insert replacement dbg.values for instructions they are deleting. This is useful in situations where salvageDebugInfo is inapplicable, say, because the new dbg.value cannot refer to an operand of the dying value. The utility is called insertReplacementDbgValues. It assumes that the instruction 'From' is going to be deleted, and inserts replacement dbg.values for each debug user of 'From'. The newly-inserted dbg.values refer to 'To' instead of 'From'. Each replacement dbg.value has the same location and variable as the debug user it replaces, has a DIExpression determined by the result of 'RewriteExpr' applied to an old debug user of 'From', and is placed before 'InsertBefore'. This should simplify future patches, like D48331. llvm-svn: 335144
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Paul Robinson authored
llvm-svn: 335143
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