Commits · f4dfd63c74899e2953b176de2174ae7a8924a72c · Roger Ferrer / llvm-epi · GitLab

May 15, 2019
- [IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format · f4dfd63c
  Fangrui Song authored May 15, 2019
  f4dfd63c
- Use an offset from TOS for idempotent rmw locked op lowering · 445f942f
  Philip Reames authored May 14, 2019
  445f942f
May 14, 2019
- [NFC][CodeGen][X86][AArch64] Add and-const-mask + const-shift pattern tests · 7baf528a
  Roman Lebedev authored May 14, 2019
  7baf528a
- [AMDGPU] Fixed handling of imemdiate i1 literals · 05791d90
  Stanislav Mekhanoshin authored May 14, 2019
  05791d90
- [AMDGPU] gfx1010 Strengthen some SMEM WAR hazard unit tests. NFC. · 7b200326
  Stanislav Mekhanoshin authored May 14, 2019
  7b200326
- [X86] Disable shouldFoldConstantShiftPairToMask for scalar shifts on AMD targets (PR40758) · c2d9cfd9
  Simon Pilgrim authored May 14, 2019
  c2d9cfd9
- [PowerPC] Custom lower known CR bit spills · 22561972
  Lei Huang authored May 14, 2019
  22561972
- [IRTranslator] Don't hardcode GEP index type · a568222d
  Diana Picus authored May 14, 2019
  a568222d
- [X86] Prefer locked stack op over mfence for seq_cst 64-bit stores on 32-bit targets · 3098e44d
  Philip Reames authored May 14, 2019
  3098e44d
- [PowerPC][NFC] Fix typos in triples · b7b3d866
  Jinsong Ji authored May 14, 2019
  b7b3d866
- [X86] Use X86 instead of X32 as a check prefix in atomic-idempotent.ll. NFC · cc761e6f
  Craig Topper authored May 14, 2019
  cc761e6f
- [SDAG, x86] allow targets to override test for binop opcodes · 3a13d970
  Sanjay Patel authored May 14, 2019
  3a13d970
May 13, 2019
- [WebAssembly] Don't assume that zext/sext result is i32/i64 in fast isel (PR41841) · 323dc634
  Nikita Popov authored May 13, 2019
  323dc634
- [AMDGPU] gfx1010 tests. NFC. · d9930d49
  Stanislav Mekhanoshin authored May 13, 2019
  d9930d49
- Revert [X86] Avoid SFB - Fix inconsistent codegen with/without debug info · 91a9d4ef
  Robert Lougher authored May 13, 2019
  91a9d4ef
- [TargetLowering] Handle multi depth GEPs w/ inline asm constraints · c33f754e
  Nick Desaulniers authored May 13, 2019
  c33f754e
- [X86][SSE] LowerBuildVectorv4x32 - don't insert MOVQ for undef elts · 73aee290
  Simon Pilgrim authored May 13, 2019
  73aee290
- [X86][SSE] Relax use limits for lowerAddSubToHorizontalOp (PR32433) · cf5a8eb7
  Simon Pilgrim authored May 13, 2019
  cf5a8eb7
- [TargetLowering] Add SimplifyDemandedBits support for ZERO_EXTEND_VECTOR_INREG · d3cedee3
  Simon Pilgrim authored May 13, 2019
  d3cedee3
- [X86] Add test case for mask register variant of PR41619 which should be fixed after r360552 · c6a6c107
  Craig Topper authored May 13, 2019
  c6a6c107
- [DAGCombiner] narrow vector binop with inserts/extract · 05dafb1c
  Sanjay Patel authored May 13, 2019
  05dafb1c
- [x86] add test for insert/extract binop; NFC · 83e61bc5
  Sanjay Patel authored May 13, 2019
  83e61bc5
- Add constrained fptrunc and fpext intrinsics. · 5987749e
  Kevin P. Neal authored May 13, 2019
  5987749e
- [SystemZ] Model floating-point control register · 8e42f6dd
  Ulrich Weigand authored May 13, 2019
  8e42f6dd
- [ARM][ParallelDSP] Relax alias checks · a33e311a
  Sam Parker authored May 13, 2019
  a33e311a
- [DAGCombiner] Fix invalid alias analysis. · 9afc4764
  Clement Courbet authored May 13, 2019
  9afc4764
- [DAGCombiner][NFC] Commit test to show fix in D61846. · c4e37fd9
  Clement Courbet authored May 13, 2019
  c4e37fd9
- [BPF] emit BTF sections only if debuginfo available · 98fe9c98
  Yonghong Song authored May 13, 2019
  98fe9c98
- Recommit r358887 "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits bitcast handling" · 61e556d2
  Craig Topper authored May 13, 2019
  61e556d2
May 12, 2019
- [X86][AVX] Split VZEXT_MOVL ymm/zmm if the upper elements are not demanded. · a7fc7630
  Simon Pilgrim authored May 12, 2019
  a7fc7630
- [DAGCombiner] try to move bitcast after extract_subvector · a09e6868
  Sanjay Patel authored May 12, 2019
  a09e6868
May 11, 2019
- [X86][SSE] SimplifyDemandedBits - call PEXTRB/PEXTRW SimplifyDemandedVectorElts as well. · fda6bffd
  Simon Pilgrim authored May 11, 2019
  fda6bffd
- [DAG] Add SimplifyDemandedBits support for BITREVERSE · 605a8407
  Simon Pilgrim authored May 11, 2019
  605a8407
- [X86] Updated shift-mask test targets for D61830 · 3fa632a1
  Simon Pilgrim authored May 11, 2019
  3fa632a1
- [X86] Add scalar shl+lshr -> shift+mask tests (PR40758) · 91e697c1
  Simon Pilgrim authored May 11, 2019
  91e697c1
- [X86] Add avx512f tests for boolean reduction · 6f7c62d7
  Simon Pilgrim authored May 11, 2019
  6f7c62d7
- [X86][SSE] Add SimplifyDemandedVectorElts HADD/HSUB handling. · e4c5b6d9
  Simon Pilgrim authored May 11, 2019
  e4c5b6d9
- [X86] Add CMOV_FR32X/CMOV_FR64X pseudo instructions. Use them in fast isel to... · c9d7484a
  Craig Topper authored May 11, 2019
  c9d7484a
- [X86][SSE] Tweaked HADD/HSUB SimplifyDemandedVectorElts · 4871a305
  Simon Pilgrim authored May 11, 2019
  4871a305
- [X86][SSE] Add integer HADD/HSUB SimplifyDemandedVectorElts tests · 1db0cc9e
  Simon Pilgrim authored May 11, 2019
  1db0cc9e